Canon EOS R5 / R6

[yourboylloyd]

Could you please send me a craw file from R6 ?

I'll send two

[lorenzo353]

You can find some raw files from the R6 here:

https://www.dpreview.com/sample-galleries/6671206782/canon-eos-r6-sample-gallery/8454525047

Thank you, Lars, but I need CRAW (compact raw) files, please

[lorenzo353]

I'll send two

Thank you!

[lorenzo353]

Thank you!

you sent me raw, not craw.

[yourboylloyd]

Ohhhhh sorry. Didn't know that there was a difference. I'll take some in a few

[wib]

did anyone noticed that change in the firmware 1.1.1 of the R6
https://www.canon-europe.com/support/consumer_products/products/cameras/digital_slr/eos-r6.html?type=firmware&firmwaredetailid=tcm:13-2011538&os=macos%2010.15%20%28catalina%29&language=en



is it related to the "time hack" ?

[Lars Steenhoff]

seems like a way from canon to prevent the date change timer reset

[Walter Schulz]

Has anyone any facts or are we going EOSHD here?

[Lars Steenhoff]

No facts just assumtions based on that firmware discription

[whitelight]

seems like a way from canon to prevent the date change timer reset

It's been reported the timer reset hack is still working with firmware 1.1.1

[Lars Steenhoff]

Thanks, glad to see my assumption was wrong

[wib]

great ! Sorry to have sounded the alarm

[gravitatemediagroup]

any 5d3 w/danne build VS R5 raw videos in the wild? or would anybody be able to make one?  sorry if this has been discussed already.

[yourboylloyd]

I'm working on an R6 10bit vs 5D2 10bit video. Probably not the same but close enough right?

[allemyr]

I'm working on an R6 10bit vs 5D2 10bit video. Probably not the same but close enough right?

Not close enough for me you know why

The quality of R6 is outstanding ofcourse

You two should do a collab together. This raw postprocessing and quality at shooting is also outstanding. I post his forumthread here:  https://www.magiclantern.fm/forum/index.php?topic=25312.0

[garry23]

In case some are interested. https://blog.yifangu.com/2020/10/09/canon-eos-r5-thermal-mod/

[lorenzo353]

Hi,

could you please send me craw files ?

Lorenzo

Ohhhhh sorry. Didn't know that there was a difference. I'll take some in a few

[yourboylloyd]

could you please send me craw files ?

Wowwww I swore I did that already. Sorry. Check your PM

[ryebrye]

I've got R5 craw files. If anyone needs them, let me know

Sent from my Pixel 4 XL using Tapatalk

[coon]

Crosspost from https://www.magiclantern.fm/forum/index.php?topic=22770.msg233318#msg233318:

Code Select Expand


'Get R6 LED base

private sub save_led_base(fileName)
  RemoveFile(fileName)

  f = OpenFileCREAT(fileName)
  CloseFile(f)

  f = OpenFileWR(fileName)

  pLedBase = 0x4F54
  WriteFileString(f, "LED base 1: [0x%08X]: 0x%08X\n", pLedBase, *pLedBase)

  pLedBase = 0x4F5C
  WriteFileString(f, "LED base 2: [0x%08X]: 0x%08X\n", pLedBase, *pLedBase)

  CloseFile(f)
end sub

private sub Initialize()
  save_led_base("B:/LED_BASE.TXT")
end sub


Could someone with a R6 execute this and tell me the result?

Update: yourboylloyd did run this on his R6 and got the following result:

Code Select Expand


[0x01A14B24] LED 0: 0xD22390C2
[0x01A14B48] LED 1: 0xD2239000
[0x01A14B6C] LED 2: 0xD22393FC
[0x01A14B90] LED 3: 0xD2239000
[0x01A14BB4] LED 4: 0xD2239001
[0x01A14BD8] LED 5: 0xD2238F00
[0x01A14BFC] LED 6: 0xD223900B
[0x01A14C20] LED 7: 0xD2239037
[0x01A14C44] LED 8: 0xD2239000
[0x01A14C68] LED 9: 0xD2239001
[0x01A14C8C] LED 10: 0x30218F00
[0x01A14CB0] LED 11: 0xD223900B
[0x01A14CD4] LED 12: 0xD2239037
[0x01A14CF8] LED 13: 0xD2239000
[0x01A14D1C] LED 14: 0xD2239001
[0x01A14D40] LED 15: 0xD2238700
[0x01A14D64] LED 16: 0xD223900B
[0x01A14D88] LED 17: 0xD2239037
[0x01A14DAC] LED 18: 0xD2239000
[0x01A14DD0] LED 19: 0xD2239001
[0x01A14DF4] LED 20: 0xD2238F00
[0x01A14E18] LED 21: 0xD223900B
[0x01A14E3C] LED 22: 0xD2239037
[0x01A14E60] LED 23: 0xD2239000
[0x01A14E84] LED 24: 0xD2239001
[0x01A14EA8] LED 25: 0xD2238F00
[0x01A14ECC] LED 26: 0xD223900B
[0x01A14EF0] LED 27: 0xD2239037
[0x01A14F14] LED 28: 0xD2239000
[0x01A14F38] LED 29: 0xD2239001
[0x01A14F5C] LED 30: 0xD2238F00
[0x01A14F80] LED 31: 0xB24F797D
[0x01A14FA4] LED 32: 0xD2238DFF
[0x01A14FC8] LED 33: 0xD3C4DFA0
[0x01A14FEC] LED 34: 0xD2239000
[0x01A15010] LED 35: 0xB24F797D
[0x01A15034] LED 36: 0xD2238FFF
[0x01A15058] LED 37: 0xD3C4E030
[0x01A1507C] LED 38: 0xD2239000
[0x01A150A0] LED 39: 0xB24F797D
[0x01A150C4] LED 40: 0xD2238FDD
[0x01A150E8] LED 41: 0xD3C4E0C0
[0x01A1510C] LED 42: 0xD2239000
[0x01A15130] LED 43: 0xB24F797D
[0x01A15154] LED 44: 0xD0238BDF
[0x01A15178] LED 45: 0xD3C4E150
[0x01A1519C] LED 46: 0xD2239000
[0x01A151C0] LED 47: 0xB24F797D
[0x01A151E4] LED 48: 0xD0238FFF
[0x01A15208] LED 49: 0xD3C4E1E0
[0x01A1522C] LED 50: 0xD2239000
[0x01A15250] LED 51: 0xB24F797D
[0x01A15274] LED 52: 0xD2238FFF
[0x01A15298] LED 53: 0xD3C4E270
[0x01A152BC] LED 54: 0xD2239000
[0x01A152E0] LED 55: 0xB24F797D


Card LED address is probably 0xD22390C2 on R6 but I am a bit confused why there are 56 possible LEDs...

[coon]

Crosspost from https://www.magiclantern.fm/forum/index.php?topic=22770.msg233556#msg233556:

Code Select Expand


'Get R6 Interrupt Vector Table

dim pIvt_table_1 = 0x2efd8
dim vector1_len = 0x280

dim pIvt_table_2 = 0x311dc
dim vector2_len = 0x40

private sub write_table(hFile, pVectorTable, startVector, numElements)
  isrVector = startVector

  do while isrVector < numElements
    ppIrqName = pVectorTable + isrVector * 4
    WriteFileString(hFile, "0x%03X: %s\n", isrVector, *ppIrqName)

    isrVector = isrVector + 1
  loop
end sub

private sub save_ivt(fileName)
  RemoveFile(fileName)

  hFile = OpenFileCREAT(fileName)
  CloseFile(hFile)

  hFile = OpenFileWR(fileName)

  write_table(hFile, pIvt_table_1, 0, vector1_len)
  write_table(hFile, pIvt_table_2, vector1_len, vector2_len)

  CloseFile(hFile)
end sub

private sub Initialize()
  save_ivt("B:/R6_IVT.TXT")
end sub


Could someone with a R6 execute this and tell me the result?

update: again yourboylloyd did run this on his R6 (thanks alot!) and got the following result:

Code Select Expand


0x000: -noise-
0x001: EDOMAIN_EDMAC_1_WR_M1
0x002: EDOMAIN_EDMAC_6_WR_SS7
0x003: EDOMAIN_EDMAC_3_RD_S1_A
0x004: EDOMAIN_VITON1
0x005: (reserved)
0x006: (reserved)
0x007: CPROC_14
0x008: TMU_INT_SWA
0x009: TMU_INT_OCCH0SP
0x00A: INTC_XINT_0
0x00B: TCU_T0OUT
0x00C: POSTMAN_RCVINT0
0x00D: POSTMAN_FIFOINT0
0x00E: MARIUS_TIMER_OC0_INT
0x00F: MARIUS_TIMER_IC0_INT
0x010: EDOMAIN_SYNGEN_1
0x011: EDOMAIN_EDMAC_1_WR_S0
0x012: EDOMAIN_EDMAC_6_WR_SS8
0x013: EDOMAIN_EDMAC_3_RD_L0_B
0x014: EDOMAIN_VITON2
0x015: (reserved)
0x016: (reserved)
0x017: CPROC_15
0x018: TMU_INT_SWB
0x019: TMU_INT_OCCH0EP
0x01A: INTC_XINT_1
0x01B: TCU_T1OUT
0x01C: POSTMAN_RCVINT1
0x01D: POSTMAN_FIFOINT1
0x01E: MARIUS_TIMER_OC1_INT
0x01F: MARIUS_TIMER_IC1_INT
0x020: EDOMAIN_SYNGEN_2
0x021: EDOMAIN_EDMAC_1_WR_S1
0x022: EDOMAIN_EDMAC_6_WR_SS9
0x023: EDOMAIN_EDMAC_3_RD_L1_B
0x024: EDOMAIN_AFFINE_OVR_ERR
0x025: (reserved)
0x026: (reserved)
0x027: SYNC_IRQ_LSS1
0x028: TMU_INT_OCALL
0x029: TMU_INT_OCCH1SP
0x02A: INTC_XINT_2
0x02B: TCU_T2OUT
0x02C: POSTMAN_RCVINT2
0x02D: POSTMAN_FIFOINT2
0x02E: MARIUS_TIMER_OC2_INT
0x02F: MARIUS_TIMER_IC2_INT
0x030: EDOMAIN_SYNGEN_3
0x031: EDOMAIN_EDMAC_1_WR_S2
0x032: EDOMAIN_EDMAC_7_WR_S0
0x033: EDOMAIN_EDMAC_3_RD_S0_B
0x034: EDOMAIN_SARIDON
0x035: (reserved)
0x036: (reserved)
0x037: SYNC_IRQ_LSS1_ST1
0x038: TMU_INT_PULGENCEI
0x039: TMU_INT_OCCH1EP
0x03A: INTC_XINT_3
0x03B: TCU_T3OUT
0x03C: POSTMAN_RCVINT3
0x03D: POSTMAN_FIFOINT3
0x03E: MARIUS_TIMER_OC3_INT
0x03F: MARIUS_TIMER_IC3_INT
0x040: EDOMAIN_SYNGEN_4
0x041: EDOMAIN_EDMAC_1_WR_S3
0x042: EDOMAIN_EDMAC_7_WR_S1
0x043: EDOMAIN_EDMAC_3_RD_S1_B
0x044: EDOMAIN_MESSI
0x045: (reserved)
0x046: (reserved)
0x047: SYNC_IRQ_LSS2
0x048: TMU_INT_ICAPCEI
0x049: TMU_INT_OCCH2SP
0x04A: INTC_XINT_4
0x04B: TCU_T4OUT
0x04C: POSTMAN_RCVINT4
0x04D: POSTMAN_FIFOINT4
0x04E: MARIUS_TIMER_OC4_INT
0x04F: MARIUS_TIMER_IC4_INT
0x050: EDOMAIN_SYNGEN_FRM
0x051: EDOMAIN_EDMAC_1_WR_S4
0x052: EDOMAIN_EDMAC_7_WR_SS0
0x053: EDOMAIN_EDMAC_5_RD_L0
0x054: EDOMAIN_DURAN
0x055: (reserved)
0x056: (reserved)
0x057: SYNC_IRQ_LSS2_ST1
0x058: CPROC_0
0x059: TMU_INT_OCCH2EP
0x05A: INTC_XINT_5
0x05B: TCU_T5OUT
0x05C: POSTMAN_RCVINT5
0x05D: POSTMAN_FIFOINT5
0x05E: MARIUS_TIMER_OC5_INT
0x05F: MARIUS_TIMER_IC5_INT
0x060: EDOMAIN_SYNGEN_1_A
0x061: EDOMAIN_EDMAC_1_WR_SS0
0x062: EDOMAIN_EDMAC_7_CAP_WR_SS0
0x063: EDOMAIN_EDMAC_5_RD_M0
0x064: EDOMAIN_DANCING_FEN
0x065: (reserved)
0x066: (reserved)
0x067: SYNC_IRQ_INTVI1
0x068: CPROC_1
0x069: TMU_INT_OCCH3SP
0x06A: INTC_XINT_6
0x06B: TCU_IPCOUT4
0x06C: POSTMAN_RCVINT6
0x06D: POSTMAN_FIFOINT6
0x06E: MARIUS_TIMER_OC6_INT
0x06F: MARIUS_TIMER_IC6_INT
0x070: EDOMAIN_SYNGEN_2_A
0x071: EDOMAIN_EDMAC_1_WR_SS1
0x072: EDOMAIN_EDMAC_7_CAP_WR_SS1
0x073: EDOMAIN_EDMAC_5_RD_M1
0x074: EDOMAIN_DANCING_SURF
0x075: (reserved)
0x076: (reserved)
0x077: SYNC_IRQ_VI1_SET_1
0x078: CPROC_2
0x079: TMU_INT_OCCH3EP
0x07A: INTC_XINT_7
0x07B: TCU_T4F_INT
0x07C: POSTMAN_RCVINT7
0x07D: POSTMAN_FIFOINT7
0x07E: MARIUS_TIMER_OC7_INT
0x07F: MARIUS_TIMER_IC7_INT
0x080: EDOMAIN_SYNGEN_3_A
0x081: EDOMAIN_EDMAC_1_WR_SS2
0x082: EDOMAIN_EDMAC_7_CAP_WR_SS2
0x083: EDOMAIN_EDMAC_5_RD_S0
0x084: EDOMAIN_DANCING_RACI
0x085: FDOMAIN_0
0x086: SYNC_IRQ_INTB60V
0x087: SYNC_IRQ_VI1_SET_2
0x088: CPROC_3
0x089: TMU_INT_OCCH4SP
0x08A: INTC_XINT_8
0x08B: TCU_IPCOUT5
0x08C: POSTMAN_DIRECTINT0
0x08D: POSTMAN_SEMAPHORE0
0x08E: MARIUS_TIMER_ICOC_OC0INT
0x08F: MARIUS_TIMER_ICOC_IC0INT
0x090: EDOMAIN_SYNGEN_4_A
0x091: EDOMAIN_EDMAC_1_WR_SS3
0x092: EDOMAIN_EDMAC_0_OPERA_WR
0x093: EDOMAIN_EDMAC_5_RD_S1
0x094: EDOMAIN_KOALA_WR0
0x095: FDOMAIN_1
0x096: SYNC_IRQ_INTB59V
0x097: SYNC_IRQ_VI1_SET_3
0x098: CPROC_4
0x099: TMU_INT_OCCH4EP
0x09A: INTC_XINT_9
0x09B: TCU_T5F_INT
0x09C: POSTMAN_DIRECTINT1
0x09D: POSTMAN_SEMAPHORE1
0x09E: MARIUS_TIMER_ICOC_OC1INT
0x09F: MARIUS_TIMER_ICOC_IC1INT
0x0A0: EDOMAIN_SYNGEN_FRM_A
0x0A1: EDOMAIN_EDMAC_1_WR_SS4
0x0A2: EDOMAIN_EDMAC_6_DAN_WR
0x0A3: EDOMAIN_EDMAC_5_RD_S2
0x0A4: EDOMAIN_KOALA_WR1
0x0A5: FDOMAIN_2
0x0A6: SYNC_IRQ_INTB50V
0x0A7: SYNC_IRQ_INTVI2
0x0A8: CPROC_5
0x0A9: TMU_INT_OCCH5SP
0x0AA: INTC_XINT_10
0x0AB: APROC_0
0x0AC: POSTMAN_DIRECTINT2
0x0AD: POSTMAN_SEMAPHORE2
0x0AE: OMAR_TIMER_OC0_INT
0x0AF: OMAR_TIMER_IC0_INT
0x0B0: EDOMAIN_SYNGEN_1_B
0x0B1: EDOMAIN_EDMAC_2_WR_L0_A
0x0B2: EDOMAIN_EDMAC_1_RD_L0
0x0B3: EDOMAIN_EDMAC_6_RD_S0
0x0B4: EDOMAIN_KOALA_WR2
0x0B5: FDOMAIN_3
0x0B6: SYNC_IRQ_INTB49V
0x0B7: SYNC_IRQ_VI2_SET_1
0x0B8: CPROC_6
0x0B9: TMU_INT_OCCH5EP
0x0BA: INTC_XINT_11
0x0BB: APROC_1
0x0BC: POSTMAN_DIRECTINT3
0x0BD: POSTMAN_SEMAPHORE3
0x0BE: OMAR_TIMER_OC1_INT
0x0BF: OMAR_TIMER_IC1_INT
0x0C0: EDOMAIN_SYNGEN_2_B
0x0C1: EDOMAIN_EDMAC_2_WR_L1_A
0x0C2: EDOMAIN_EDMAC_1_RD_L1
0x0C3: EDOMAIN_EDMAC_6_RD_S1
0x0C4: EDOMAIN_KOALA_RD0
0x0C5: FDOMAIN_4
0x0C6: SYNC_IRQ_INTL60V1
0x0C7: SYNC_IRQ_VI2_SET_2
0x0C8: CPROC_7
0x0C9: TMU_INT_ICAPCH0
0x0CA: INTC_XINT_12
0x0CB: APROC_2
0x0CC: POSTMAN_DIRECTINT4
0x0CD: POSTMAN_FIFO_ERR0
0x0CE: OMAR_TIMER_OC2_INT
0x0CF: OMAR_TIMER_IC2_INT
0x0D0: EDOMAIN_SYNGEN_3_B
0x0D1: EDOMAIN_EDMAC_2_WR_S0_A
0x0D2: EDOMAIN_EDMAC_1_RD_L2
0x0D3: EDOMAIN_EDMAC_6_RD_S2
0x0D4: EDOMAIN_KOALA_RD1
0x0D5: FDOMAIN_5
0x0D6: SYNC_IRQ_INTL60V1_ST1
0x0D7: SYNC_IRQ_VI2_SET_3
0x0D8: CPROC_8
0x0D9: TMU_INT_ICAPCH1
0x0DA: INTC_XINT_13
0x0DB: APROC_3
0x0DC: POSTMAN_DIRECTINT5
0x0DD: UART0_RX_INTREQRX
0x0DE: OMAR_TIMER_OC3_INT
0x0DF: OMAR_TIMER_IC3_INT
0x0E0: EDOMAIN_SYNGEN_4_B
0x0E1: EDOMAIN_EDMAC_2_WR_L0_B
0x0E2: EDOMAIN_EDMAC_1_RD_M0
0x0E3: EDOMAIN_EDMAC_6_RD_S3
0x0E4: EDOMAIN_KOALA_RD2
0x0E5: FDOMAIN_6
0x0E6: SYNC_IRQ_INTL60V2
0x0E7: SYNC_IRQ_INTVI3
0x0E8: CPROC_9
0x0E9: TMU_INT_ICAPCH2
0x0EA: INTC_XINT_14
0x0EB: APROC_4
0x0EC: POSTMAN_DIRECTINT6
0x0ED: UART0_TX_INTREQTX
0x0EE: OMAR_TIMER_OC4_INT
0x0EF: OMAR_TIMER_IC4_INT
0x0F0: EDOMAIN_SYNGEN_FRM_B
0x0F1: EDOMAIN_EDMAC_2_WR_L1_B
0x0F2: EDOMAIN_EDMAC_1_RD_S0
0x0F3: EDOMAIN_EDMAC_6_RD_S4
0x0F4: EDOMAIN_COMBAT_INTEG_1
0x0F5: FDOMAIN_7
0x0F6: SYNC_IRQ_INTL60V2_ST1
0x0F7: SYNC_IRQ_VI3_SET_1
0x0F8: CPROC_10
0x0F9: TMU_INT_ICAPCH3
0x0FA: INTC_XINT_15
0x0FB: APROC_5
0x0FC: POSTMAN_DIRECTINT7
0x0FD: UART1_RX_INTREQRX
0x0FE: OMAR_TIMER_OC5_INT
0x0FF: OMAR_TIMER_IC5_INT
0x100: EDOMAIN_HEAD_ERR
0x101: EDOMAIN_EDMAC_2_WR_S0_B
0x102: EDOMAIN_EDMAC_1_RD_S1
0x103: EDOMAIN_EDMAC_6_RD_S5
0x104: EDOMAIN_COMBAT_BLOCK_1
0x105: FDOMAIN_8
0x106: SYNC_IRQ_INTL59V1
0x107: SYNC_IRQ_VI3_SET_2
0x108: CPROC_11
0x109: TMU_INT_ICAPCH4
0x10A: INTC_XINT_16
0x10B: APROC_6
0x10C: CCLIME_INT_SODA
0x10D: UART1_TX_INTREQTX
0x10E: OMAR_TIMER_OC6_INT
0x10F: OMAR_TIMER_IC6_INT
0x110: EDOMAIN_ATOMIC_ERR
0x111: EDOMAIN_EDMAC_3_WR_L0_A
0x112: EDOMAIN_EDMAC_1_RD_SS0
0x113: EDOMAIN_EDMAC_6_RD_S6
0x114: EDOMAIN_COMBAT_INTEG_7
0x115: (reserved)
0x116: SYNC_IRQ_INTL59V1_ST1
0x117: SYNC_IRQ_VI3_SET_3
0x118: CPROC_12
0x119: TMU_INT_ICAPCH5
0x11A: INTC_XINT_17
0x11B: APROC_7
0x11C: CCLIME_INT_TM2MD_RDMA
0x11D: UART2_RX_INTREQRX
0x11E: OMAR_TIMER_OC7_INT
0x11F: OMAR_TIMER_IC7_INT
0x120: EDOMAIN_HEAD_ERR2
0x121: EDOMAIN_EDMAC_3_WR_S0_A
0x122: EDOMAIN_EDMAC_1_RD_SS1
0x123: EDOMAIN_EDMAC_6_RD_S7
0x124: EDOMAIN_COMBAT_BLOCK_7
0x125: (reserved)
0x126: SYNC_IRQ_INTL59V2
0x127: SYNC_IRQ_INTVI4
0x128: CPROC_13
0x129: TMU_INT_ICAPCH6
0x12A: INTC_XINT_18
0x12B: APROC_8
0x12C: CCLIME_INT_TM2MD_WDMA
0x12D: UART2_TX_INTREQTX
0x12E: OMAR_TIMER_ICOC_OC0INT
0x12F: OMAR_TIMER_ICOC_IC0INT
0x130: EDOMAIN_HEAD_ERR3
0x131: EDOMAIN_EDMAC_3_WR_S1_A
0x132: EDOMAIN_EDMAC_1_RD_SS2
0x133: EDOMAIN_EDMAC_6_RD_S8
0x134: EDOMAIN_WEABER1
0x135: ORCA_A_0
0x136: SYNC_IRQ_INTL59V2_ST1
0x137: SYNC_IRQ_VI4_SET_1
0x138: CPROC_16
0x139: TMU_INT_ICAPCH7
0x13A: INTC_XINT_19
0x13B: APROC_9
0x13C: CCLIME_INT_TSUMXD_RDMAC
0x13D: PCIE_IRQ_PCIE0
0x13E: OMAR_TIMER_ICOC_OC1INT
0x13F: OMAR_TIMER_ICOC_IC1INT
0x140: EDOMAIN_SAP1
0x141: EDOMAIN_EDMAC_3_WR_L0_B
0x142: EDOMAIN_EDMAC_1_RD_SS3
0x143: EDOMAIN_EDMAC_6_RD_SS0
0x144: EDOMAIN_WEABER2
0x145: ORCA_A_1
0x146: SYNC_IRQ_INTL50V1
0x147: SYNC_IRQ_VI4_SET_2
0x148: CPROC_17
0x149: TMU_INT_ICAPCH8
0x14A: INTC_XINT_20
0x14B: (reserved)
0x14C: CCLIME_INT_TSUMXD_W0DMA
0x14D: PCIE_IRQ_PCIE1
0x14E: REM_REM_INT
0x14F: ZICO_TIMER_IRQ
0x150: EDOMAIN_SAP2
0x151: EDOMAIN_EDMAC_3_WR_S0_B
0x152: EDOMAIN_EDMAC_1_RD_SS4
0x153: EDOMAIN_EDMAC_6_RD_SS1
0x154: EDOMAIN_HISTORY
0x155: ORCA_A_2
0x156: SYNC_IRQ_INTL50V1_ST1
0x157: SYNC_IRQ_VI4_SET_3
0x158: CPROC_18
0x159: TMU_INT_ICAPCH9
0x15A: INTC_XINT_21
0x15B: (reserved)
0x15C: CCLIME_INT_TSUMXD_W1DMA
0x15D: PCIE_IRQ_PCIE2
0x15E: SDDOMAIN_SDCON0
0x15F: HDMAC0_INTRREQ1
0x160: EDOMAIN_LIP
0x161: EDOMAIN_EDMAC_3_WR_S1_B
0x162: EDOMAIN_EDMAC_1_RD_SS5
0x163: EDOMAIN_EDMAC_6_RD_SS2
0x164: EDOMAIN_HISTORY2_1
0x165: ORCA_A_3
0x166: SYNC_IRQ_INTL50V2
0x167: SYNC_IRQ_INTVI4B
0x168: (reserved)
0x169: TMU_INT_ICAPCH10
0x16A: INTC_XINT_22
0x16B: (reserved)
0x16C: CCLIME_INT_CPU_SLEEP
0x16D: PCIE_IRQ_PCIE3
0x16E: SDDOMAIN_TDMAC0
0x16F: HDMAC0_INTRREQ2
0x170: EDOMAIN_SANTA1
0x171: EDOMAIN_EDMAC_5_WR_M0
0x172: EDOMAIN_EDMAC_1_RD_SS6
0x173: EDOMAIN_EDMAC_6_RD_SS3
0x174: EDOMAIN_HISTORY2_2
0x175: ORCA_A_4
0x176: SYNC_IRQ_INTL50V2_ST1
0x177: SYNC_IRQ_VI4B_SET_1
0x178: (reserved)
0x179: TMU_INT_ICAPCH11
0x17A: INTC_XINT_23
0x17B: (reserved)
0x17C: CCLIME_INT_OTHERS
0x17D: PCIE_IRQ_PCIE4
0x17E: SDDOMAIN_SDCON1
0x17F: HDMAC0_INTRREQ3
0x180: EDOMAIN_YAWARA
0x181: EDOMAIN_EDMAC_5_WR_S0
0x182: EDOMAIN_EDMAC_2_RD_L0_A
0x183: EDOMAIN_EDMAC_6_RD_SS4
0x184: EDOMAIN_HISTORY2_3
0x185: ORCA_A_5
0x186: SYNC_IRQ_INTLSSDV1
0x187: SYNC_IRQ_VI4B_SET_2
0x188: (reserved)
0x189: TMU_INT_SWA_ONLY
0x18A: INTC_XINT_24
0x18B: HERMES_SITTER
0x18C: CCLIME_INT_UART1_RX
0x18D: PCIE_IRQ_PCIE5
0x18E: SDDOMAIN_TDMAC1
0x18F: HDMAC0_INTRREQ4
0x190: EDOMAIN_OPERA_OPEKICK0
0x191: EDOMAIN_EDMAC_5_WR_S1
0x192: EDOMAIN_EDMAC_2_RD_L1_A
0x193: EDOMAIN_EDMAC_6_RD_SS5
0x194: EDOMAIN_HISTORY2_4
0x195: ORCA_A_6
0x196: SYNC_IRQ_INTLSSDV1_ST1
0x197: SYNC_IRQ_VI4B_SET_3
0x198: SYNC_IRQ_VI6_SET_3
0x199: TMU_INT_SWB_ONLY
0x19A: INTC_XINT_25
0x19B: HERMES_SWEET
0x19C: CCLIME_INT_UART1_TX
0x19D: USB_INT_TENG
0x19E: SDDOMAIN_SDCON2
0x19F: HDMAC0_INTRREQ5
0x1A0: EDOMAIN_OPERA_OPEKICK1
0x1A1: EDOMAIN_EDMAC_5_WR_S2
0x1A2: EDOMAIN_EDMAC_2_RD_S0_A
0x1A3: EDOMAIN_EDMAC_6_RD_SS6
0x1A4: EDOMAIN_BIKING
0x1A5: ORCA_A_7
0x1A6: SYNC_IRQ_INTLSSDV2
0x1A7: SYNC_IRQ_INTVI5
0x1A8: SYNC_IRQ_INTVI7
0x1A9: TMU_INT_SWC_ONLY
0x1AA: INTC_XINT_26
0x1AB: HERMES_SWAN0
0x1AC: CCLIME_INT_TSUM_SD_SDCON
0x1AD: DSI0_IRQ_DSI0
0x1AE: SDDOMAIN_TDMAC2
0x1AF: HDMAC0_INTRREQ6
0x1B0: EDOMAIN_OPERA_OPEKICK2
0x1B1: EDOMAIN_EDMAC_6_WR_S0
0x1B2: EDOMAIN_EDMAC_2_RD_S1_A
0x1B3: EDOMAIN_EDMAC_6_RD_SS7
0x1B4: EDOMAIN_CAPTAIN
0x1B5: ORCA_A_8
0x1B6: SYNC_IRQ_INTLSSDV2_ST1
0x1B7: SYNC_IRQ_INTVI6
0x1B8: SYNC_IRQ_VI7_SET_1
0x1B9: TMU_INT_SWD_ONLY
0x1BA: INTC_XINT_27
0x1BB: HERMES_SWAN1
0x1BC: CCLIME_INT_TSUM_SD_DMA
0x1BD: DSI1_IRQ_DSI1
0x1BE: DMA330_0
0x1BF: HDMAC0_INTRREQ7
0x1C0: EDOMAIN_OPERA_OPEKICK3
0x1C1: EDOMAIN_EDMAC_6_WR_S1
0x1C2: EDOMAIN_EDMAC_2_RD_S2_A
0x1C3: EDOMAIN_EDMAC_6_RD_SS8
0x1C4: EDOMAIN_COTTON
0x1C5: ORCA_A_9
0x1C6: SYNC_IRQ_INTP
0x1C7: SYNC_IRQ_VI6_SET_1
0x1C8: SYNC_IRQ_VI7_SET_2
0x1C9: (reserved)
0x1CA: INTC_IRQ_SOFT_OUT
0x1CB: HERMES_DUAL_CTRL
0x1CC: CCLIME_INT_CITRON_CORE
0x1CD: HDMI0_0
0x1CE: DMA330_1
0x1CF: MDOMAIN_0
0x1D0: EDOMAIN_OPERA_OPEKICK4
0x1D1: EDOMAIN_EDMAC_6_WR_S2
0x1D2: EDOMAIN_EDMAC_2_RD_S3_A
0x1D3: EDOMAIN_EDMAC_7_RD_S0
0x1D4: EDOMAIN_OPERA0
0x1D5: ORCA_A_10
0x1D6: SYNC_IRQ_INTP_ST1
0x1D7: SYNC_IRQ_VI6_SET_2
0x1D8: SYNC_IRQ_VI7_SET_3
0x1D9: (reserved)
0x1DA: (reserved)
0x1DB: ALGS_0
0x1DC: CCLIME_INT_CITRON_RDMA
0x1DD: HDMI0_1
0x1DE: DMA330_2
0x1DF: MDOMAIN_1
0x1E0: EDOMAIN_OPERA_OPEKICK5
0x1E1: EDOMAIN_EDMAC_6_WR_S3
0x1E2: EDOMAIN_EDMAC_2_RD_L0_B
0x1E3: EDOMAIN_EDMAC_7_CAP_RD_SS0
0x1E4: EDOMAIN_OPERA_ERR0
0x1E5: ORCA_B_11
0x1E6: SYNC_IRQ_INTE
0x1E7: SSIO_SSIOINT
0x1E8: SYNC_IRQ_INTVIO
0x1E9: (reserved)
0x1EA: (reserved)
0x1EB: ALGS_1
0x1EC: CCLIME_INT_CITRON_WDMA
0x1ED: HDMI1_0
0x1EE: DMA330_3
0x1EF: MDOMAIN_2
0x1F0: EDOMAIN_OPERA_OPEKICK6
0x1F1: EDOMAIN_EDMAC_6_WR_S4
0x1F2: EDOMAIN_EDMAC_2_RD_L1_B
0x1F3: EDOMAIN_EDMAC_0_OPERA_RD
0x1F4: EDOMAIN_OPERA_ABORT0
0x1F5: ORCA_B_12
0x1F6: SYNC_IRQ_INTE_ST1
0x1F7: SIO0_SIO0INT
0x1F8: SYNC_IRQ_VIO_SET_1
0x1F9: (reserved)
0x1FA: (reserved)
0x1FB: (reserved)
0x1FC: CCLIME_RESERVED
0x1FD: HDMI1_1
0x1FE: (reserved)
0x1FF: MDOMAIN_3
0x200: EDOMAIN_EDMAC_1_WR_L0
0x201: EDOMAIN_EDMAC_6_WR_SS0
0x202: EDOMAIN_EDMAC_2_RD_S0_B
0x203: EDOMAIN_EDMAC_6_DAN_RD
0x204: EDOMAIN_OPERA1
0x205: ORCA_B_13
0x206: DOLPHIN_IRQ_DOLPHIN_0
0x207: SIO1_SIO1INT
0x208: SYNC_IRQ_VIO_SET_2
0x209: (reserved)
0x20A: (reserved)
0x20B: (reserved)
0x20C: CCLIME_SLOTC_SDDAT1_INT
0x20D: SROMC0_OCTAL_IRQ
0x20E: I2C0_TIRQ
0x20F: MDOMAIN_4
0x210: EDOMAIN_EDMAC_1_WR_L1
0x211: EDOMAIN_EDMAC_6_WR_SS1
0x212: EDOMAIN_EDMAC_2_RD_S1_B
0x213: EDOMAIN_OPTI_RICH_A
0x214: EDOMAIN_OPERA_ERR1
0x215: ORCA_B_14
0x216: DOLPHIN_IRQ_DOLPHIN_1
0x217: SIO2_SIO2INT
0x218: SYNC_IRQ_VIO_SET_3
0x219: (reserved)
0x21A: (reserved)
0x21B: (reserved)
0x21C: SROMC0_QUAD_OIRQ_TX
0x21D: SROMC1_OIRQ_TX
0x21E: I2C0_RIRQ
0x21F: MDOMAIN_5
0x220: EDOMAIN_EDMAC_1_WR_L2
0x221: EDOMAIN_EDMAC_6_WR_SS2
0x222: EDOMAIN_EDMAC_2_RD_S2_B
0x223: EDOMAIN_OPTI_LITE_A
0x224: EDOMAIN_OPERA_ABORT1
0x225: ORCA_B_15
0x226: DOLPHIN_IRQ_DOLPHIN_2
0x227: SIO3_SIO3INT
0x228: (reserved)
0x229: (reserved)
0x22A: (reserved)
0x22B: (reserved)
0x22C: SROMC0_QUAD_OIRQ_RX
0x22D: SROMC1_OIRQ_RX
0x22E: I2C0_SIRQ
0x22F: MDOMAIN_6
0x230: EDOMAIN_EDMAC_1_WR_L3
0x231: EDOMAIN_EDMAC_6_WR_SS3
0x232: EDOMAIN_EDMAC_2_RD_S3_B
0x233: EDOMAIN_OPTI_RICH_B
0x234: EDOMAIN_HAIDI_PNL
0x235: ORCA_B_16
0x236: DOLPHIN_IRQ_DOLPHIN_3
0x237: SIO4_SIO4INT
0x238: (reserved)
0x239: (reserved)
0x23A: HARB_HARBINT
0x23B: RSTGEN_WDTINT
0x23C: SROMC0_QUAD_OIRQ_FAULT
0x23D: SROMC1_OIRQ_FAULT
0x23E: I2C1_TIRQ
0x23F: (reserved)
0x240: EDOMAIN_EDMAC_1_WR_L4
0x241: EDOMAIN_EDMAC_6_WR_SS4
0x242: EDOMAIN_EDMAC_3_RD_L0_A
0x243: EDOMAIN_OPTI_LITE_B
0x244: EDOMAIN_HAIDI_LINE
0x245: ORCA_B_17
0x246: DOLPHIN_IRQ_DOLPHIN_4
0x247: SIO5_SIO5INT
0x248: (reserved)
0x249: TSENS_IRQ_TSENS
0x24A: MCPU_DECERRINTR
0x24B: MCPU_L2CCINTR
0x24C: SROMC0_QUAD_OERR_COLLECT
0x24D: SROMC1_OERR_COLLECT
0x24E: I2C1_RIRQ
0x24F: (reserved)
0x250: EDOMAIN_EDMAC_1_WR_L5
0x251: EDOMAIN_EDMAC_6_WR_SS5
0x252: EDOMAIN_EDMAC_3_RD_L1_A
0x253: EDOMAIN_JP52_1
0x254: EDOMAIN_HAIDI_EVF
0x255: ORCA_B_18
0x256: GLDA
0x257: SIO6_SIO6INT
0x258: MARIO_0
0x259: DEBSIO
0x25A: MCPU_ECNTRINTR
0x25B: MCPU_PMUIRQ_0
0x25C: INT_TM_MISC_CPU_HANDSHAKE0
0x25D: INT_TM_MISC_CPU_HANDSHAKE1
0x25E: I2C1_SIRQ
0x25F: ADOMAIN
0x260: EDOMAIN_EDMAC_1_WR_M0
0x261: EDOMAIN_EDMAC_6_WR_SS6
0x262: EDOMAIN_EDMAC_3_RD_S0_A
0x263: EDOMAIN_JP52_2
0x264: (reserved)
0x265: DMA330_ABORT
0x266: XIMR
0x267: SIO7_SIO7INT
0x268: MARIO_1
0x269: MCPU_SCUEVABORT
0x26A: MCPU_SLVERRINTR
0x26B: MCPU_PMUIRQ_1
0x26C: MONI_MONIOUT_0
0x26D: MONI_MONIOUT_1
0x26E: MONI_MONIOUT_2
0x26F: MONI_MONIOUT_3
0x270: INTC_ANDINT_0_0
0x271: INTC_ANDINT_0_1
0x272: INTC_ANDINT_0_2
0x273: INTC_ANDINT_0_3
0x274: INTC_ANDINT_0_4
0x275: INTC_ANDINT_0_5
0x276: (reserved)
0x277: (reserved)
0x278: (reserved)
0x279: (reserved)
0x27A: INTC_ANDINT_1_0
0x27B: INTC_ANDINT_1_1
0x27C: INTC_ANDINT_1_2
0x27D: INTC_ANDINT_1_3
0x27E: INTC_ANDINT_1_4
0x27F: INTC_ANDINT_1_5


I assume this interrupt table is valid for all DIGIC X models (At the time of this post that are EOS R6 and EOS R5).

Therefore the interrupt vectors for UART (needed for qemu) are:

Code Select Expand


0x0DD: UART0_RX_INTREQRX
0x0ED: UART0_TX_INTREQTX


[preafos]

Hi,

I have a R5 at hand. Can I help with the development process?

[kitor]

Unless you know embedded C / ARM assembly or willing to spend a lot of time to learn it, at this moment - no.

[NoHinAmhherst]

I'm about to buy my Canon r6. I've had excellent success with ML on my 6D over the years. Can I still extend the video time with ML for the r6? It looks like there was some confusion about that. Also, I don't see it in the downloads, so where do I download ML for the r6? I honestly did search the forums a bit before asking this question. Is it missing from that page because it's not yet stable?

[Walter Schulz]

There is none and there will be none for the foreseeable future.