3K/UHD 5D2 Raw development and Other Digic IV Cams

[names_are_hard]

dm-spy-experiments, io_trace and io_trace_full branches

Thanks for explaining, but since I don't have those branches, I'm out until someone gives me a build they want tested

[reddeercity]

...... I'm out until someone gives me a build they want tested

I what everyone to test 
Sorry just Lazy today , I'm still getting my head back in to Magic Lantern Mode ,
Lots of rabbit holes to fall in to 

Ok here we go , i did both 1.1.3. ver firm & 1.2.3 firm . Didn't know which is the most used
I/O_Trace_Full_5D3.123
I/O_Trace_Full_5D3.113

Mainly startup , anything to expose the Cf controller routines/regs . But i'm still thinking
i may still need to go in to Qemu from other I/O Traces I've seen seems to miss the regs changing.
but that was D4 cams i think. I don't have a 5d3 cam so i can't test of couse but i've build other I/O trace builds for 7d , 550d , etc. ... with out any issue so i expect it should work.
Post the Logs here or same where i can download & or Read Thanks !   

[reddeercity]

A old experiment from a 2-3 years ago , the video hi-speed frame rate are small h264.mp4 around 25-30Mb in size .
Proof that is can go beyond 48fps , but not in standard HD size at least for the 1st one  1600x832 & the other 12080x720 HD .
i can clean up the 1600x832 @ 62.5fps(i can drop it to 60fps for stability) also i should be able to clean up that
1280x720 also @ 70.086fps with some work (not the easiest to do but can be)
The question I ask is, is this useful ? Or just a novelty say i can do xxfps
by the way the highest i can achieved is 72fps @ 720 , i've had more but i smaller frame size
i think 86fps or around there @ a little more then SD Rez (800x600 i think) then it crashed.
I never came back to it but i though if there a interest i can pursue it futher.       


1600x832-62.5fps-M02-2327.mov




5D2_1280x722-70.086-fps-M05-2305.mov

[names_are_hard]

Thanks.  I can only test 5d3 in qemu - is that still useful for you?  Can test both fw versions.

I'd be interested in getting high fps working, especially on newer cams.  These have a much higher base clock for the sensor, so possibly they can sample faster?  84MHz on 200D, compared to 24 or 32 on old cams.  Some of the new cams have 120fps native, which ones are capable but not enabled?  How far can we push this with raw video?  Fun to find out.

The only old cam I have is 70D, so if you have working code for high fps there, that would be ideal.  If not, a good write up so I can attempt to copy the approach would be great

I have a question about all these branches.  Do you like this approach?  Is it a good thing somehow, that the code is scattered across multiple branches, rather than in one place?  I don't even know which branches I'm supposed to use, there are so many.  In the repo I maintain I've merged many branches, so there is no need to switch.  Would you prefer that?

[theBilalFakhouri]

So i need to find a 5D3 setup log or any logs with CF card on the 5D3 to know the reg set
but in the mean time i'll search some more on the forum , i'm sure i saw some , just cant remember where. 

BTW, CF clock speed config (UDMA modes) and related registers were found years ago, check:
https://www.magiclantern.fm/forum/index.php?topic=12862.msg206011#msg206011

Also there a is test was done by waza57 on 5D2 in the past, he claimed that he got 30% write speed improvement on 5D2, but during his experiment he ended up with a corrupted file system for the CF card:
https://www.magiclantern.fm/forum/index.php?topic=12862.msg206061#msg206061

[reddeercity]

Yup , i know but i think there incomplete alone with reg's for udma there's HP timers and
i think there need to be configured also . Just like crop_mode it's at least 6 reg's
just to make a basic preset etc. .... I believe qemu will expose them so i can see
how the routine works in 5D3 D5 cam not just the regs.
I don't expect the reg's in 5D3 to be the same 5D2 but there usually pretty close
that how i do most of work on crop record just find the corresponding
setting in 5D2,  it works most of the time.
I need to see this from the 5D3 log . 

Code Select Expand

[   CSMgrTask:ffbdb7d8 ] (22:06) GetFirstTuple: CISTPL_CONFIG
[   CSMgrTask:ffb8c454 ] (22:06) GetConfigurationTuple
[   CSMgrTask:ffb8bcb0 ] (22:01) RequestConfiguration: pLStorage=0x685504
[   CSMgrTask:ffb8bcc8 ] (22:01)                       ConfigBase=0x200, StatusReg=0
[   CSMgrTask:ffb8bce0 ] (22:01)                       PinRepReg=0, CopyReg=0
[   CSMgrTask:ffb8bcf8 ] (22:01)                       ConfigIndex=0x1, Present=0xf
[CFATA] at CSMgrTas:FFB8BD04:FFB8BD04 [0xC0628100] -> 0x0       : ???
[CFATA] at CSMgrTas:FFB8BD0C:FFB8BD04 [0xC0628100] <- 0x0       : ???
[CFATA] at CSMgrTas:FFB8BD18:FFB8BD18 [0xC0628100] <- 0x0       : ???
[CFATA] at CSMgrTas:FFB8BD24:FFB8BD24 [0xC0628100] -> 0x0       : ???
[CFATA] at CSMgrTas:FFB8BD2C:FFB8BD24 [0xC0628100] <- 0x2       : ???
[CFATA] at CSMgrTas:FFB8BD38:FFB8BD38 [0xC0628100] <- 0x2       : ???
[CFATA] at CSMgrTas:FFB8BD48:FFB8BD44 [0xC0628044] <- 0x0       : Interrupt related?
[CFATA] at CSMgrTas:FFB8BD5C:FFB8BD54 [0xC0620200] <- 0x41      : ???
[CFATA] at CSMgrTas:FFB8BD68:FFB8BD68 [0xC0620200] -> 0x0       : ???
[   CSMgrTask:ffb8bd80 ] (22:01) RequestConfiguration: Base = 200, Data = 0
[CFATA] at CSMgrTas:FFB8BD98:FFB8BD94 [0xC0620202] <- 0x0       : ???
[CFATA] at CSMgrTas:FFB8BDB0:FFB8BDAC [0xC0620204] <- 0x0       : ???
[CFATA] at CSMgrTas:FFB8BDC8:FFB8BDC4 [0xC0620206] <- 0x0       : ???
[   CSMgrTask:ffb8bde0 ] (22:01) RequestConfiguration: SUCCESSIf this approach fail to yield result i can still do the overclock CF Controller
with software in the hp_parm branch   , got the idea from a1ex in this post
https://www.magiclantern.fm/forum/index.php?msg=199697

I did early test with the information from a1ex on 5d3
https://www.magiclantern.fm/forum/index.php?msg=207128
But failed just like waza57 did but there again i just change one reg and that's not enough

[reddeercity]

Thanks.  I can only test 5d3 in qemu - is that still useful for you?  Can test both fw versions.

Yes please do both, if you can can you do a FA_Capture(Test-Image) that the log from the 5D2 i got that info on changing reg's

I'd be interested in getting high fps working, especially on newer cams.  These have a much higher base clock for the sensor, so possibly they can sample faster?  84MHz on 200D, compared to 24 or 32 on old cams.  Some of the new cams have 120fps native, which ones are capable but not enabled?  How far can we push this with raw video?  Fun to find out.

The only old cam I have is 70D, so if you have working code for high fps there, that would be ideal.  If not, a good write up so I can attempt to copy the approach would be great

Its was base off the Crop_Recording but instead of large frame size (4k,3k etc. ...) its reduce frame size (sometime vertical compression-> stretching 1.67 (ADTG12[100c])
not very difficult.
Here in this post i explain & post images how i got 1856x704 10bit @50p with regs
sumary of the reg i used , the post explaines it better. I can do i better write up on D4 crop_record in general with hi speed frame rate , there a few rabbit hole to watch or the cam will crash/lockup
i can't tell you how many time i though I broke i may cam  , i would get so hot i couldn't handle in my hands (close to 75 degrees celsius  )   
Here is better post with cleaner image & more info on how its done
1856x704 50fps

Code Select Expand

cmos[1]   0xc00 -->0xbeD
c0f0713c  0x4f3 -->0x2d3 //liveview preview (vertial)//
c0f07150  0x523 -->0x3D3 //liveview preview (horizontal)//
c0f06008  0x23b023b --> 0x23bD237 //frame horizontal width//
c0f06088  0x4f40432 --> 0x2d4D432 //frame vertial height//
c0f06014  0x577  --> 0x34c //framerate timer "B" (i think)//
ADTG12[100c] 0x2 --> 0x4 //cmos pixel binning line (1.67:1 vertial compressing)

I have a question about all these branches.  Do you like this approach?  Is it a good thing somehow, that the code is scattered across multiple branches, rather than in one place?  I don't even know which branches I'm supposed to use, there are so many.  In the repo I maintain I've merged many branches, so there is no need to switch.  Would you prefer that?

I have branches locally i need for D4 cams development , much of the info/code parts i use come from old branches (more then 5 years ago if not 10, e.g. Motion Jpeg video code etc. ....) so i'm not sure how to answer that . I'm not a true coder etc. ... i'm a old retired mechanic that pickup some coding skill here on Magic Lantern , After the 5D3 came out the deveolpment slowly stoped on D4 cam (5D2) so if i wanted the latest and exciting feature from 5D3 (mainly crop_record) or Dual ISO video etc. ...
I had to figure it out myself (and the fact that a1ex & other devloper had no time or not enough time to help everyone) , i fumbled my way thought it . As long i can see a sample of coding i can read it and duplicate but i can't write code from scratch , i have to fellow other examples i find & of course google is my friend in coding also.   

[Walter Schulz]

I what everyone to test 
[...]
Post the Logs here or same where i can download & or Read Thanks !   

Loaded 1.2.3 build onto CF card and started up. No log. Anything I missed?

[reddeercity]

Loaded 1.2.3 build onto CF card and started up. No log. Anything I missed?

Sorry forgot to give instruction
i/o logging instruction

To run test , load ml io-trace-full build
exit liveview go to the debug menu activate the Logging feature
-- exit menu so there no liveview take a cr2 photo return to debug menu and hi-light logging again to save the log

For startup i think (i maybe wrong) but if you to Debug menu set logging and exit , shut down cam then restart , I think that should work , been a a few years since I've done this I'm a little rusty.
Try to take a picture and save it , to see if the I/O trace is working correctly  that my also so the CF routines not sure .Thanks for the help    

[reddeercity]

Looks like i found the data timing Regs(I think)one for these need to be set alone with the Reg
for udma 
 

Code Select Expand

[   CSMgrTask:ffbdbb3c ] (22:03) CF_GetAccessTiming : DatTim = 0, DatMod = 0
[CFATA] at CSMgrTas:FFB8A3D0:FFB8A3D0 [0xC06280A0] <- 0x4181410 : ???
[CFATA] at CSMgrTas:FFB8A3EC:FFB8A3EC [0xC06280A4] <- 0x4180804 : ???
[CFATA] at CSMgrTas:FFB8A4B0:FFB8A4B0 [0xC0628090] <- 0xC1C0004 : ???
[CFATA] at CSMgrTas:FFB8A4D0:FFB8A4D0 [0xC0628098] <- 0xC1C0004 : ???
[CFATA] at CSMgrTas:FFB8A4F0:FFB8A4F0 [0xC0628094] <- 0xC1C1004 : ???
[CFATA] at CSMgrTas:FFB8A580:FFB8A580 [0xC062809C] <- 0xC1C1004 : ???
I have a very  suspicion that these are the UDMA Reg that one need to set
I think 0xC0620207 could the one , untested of course, but make sense
because the 5D3 Offset is 0xC6xxx207 .

Code Select Expand

[CFATA] at CSMgrTas:FFB8BD98:FFB8BD94 [0xC0620202] <- 0x0       : ???
[CFATA] at CSMgrTas:FFB8BDB0:FFB8BDAC [0xC0620204] <- 0x0       : ???
[CFATA] at CSMgrTas:FFB8BDC8:FFB8BDC4 [0xC0620206] <- 0x0       : ???
More digging in to logs file be fore i test .

[Walter Schulz]

https://we.tl/t-1Q5eg6tDEP
Does this one contain the info you wanted?

[reddeercity]

https://we.tl/t-1Q5eg6tDEP
Does this one contain the info you wanted?

I'll check it out thanks