I still need to see where this part comes from:
ADTG Preamp = 2
I can't understand what you're comparing against without that. You say it's iso_regs related but I can't find it in iso_regs.c.
Once again, a disclaimer that I know basically nothing about ADTG, I'm just reading the code. Don't trust me very much
So, while I can comment on correctness of your code from a C perspective, I dunno what it's going to do on a real cam.
In your added code it looks like you always want to set ADTG2 and ADTG4 to the same values. If so, just use 6 for the mask field and only have one set of the four similar lines:
/* ADTG2/4 adjusts blue and green channel 1? */
adtg_new[13] = (struct adtg_new) {6, 0x8, 2}; /* was id 23 originally */
adtg_new[14] = (struct adtg_new) {6, 0x9, 2};
adtg_new[15] = (struct adtg_new) {6, 0xA, 2};
adtg_new[16] = (struct adtg_new) {6, 0xB, 2};
To understand how that works, read my comment about masks and learn about bit operations in C. Specifically you want to learn about "bitwise and". You'd also want to learn about hexadecimal / binary / decimal conversions to understand how flipping single bits changes the number.
You have a discrepancy between one of your comments and one of your lines of code. You say "ADTG4 0xFE gain", but your code has "adtg_new[21] = (struct adtg_new) {2, 0xFE, 0};", which is trying to modify ADTG2 (the mask, which is the first field in the struct, is 2). I don't know which you intended. Perhaps this should be 6 as well?
Your code is inside the is_5D3 guard. This implies a) you have a 5D3 (if not, your changes shouldn't do anything for you) b) the changes you are making only work on 5D3. Point b doesn't matter right now since it's just you using it, but if you expect this to work on multiple cams you'd want to move it outside of the guard at some point (after testing, etc).
By the way, I am guessing it's four lines because in bayer there's BGGR, four channels. Here each line sets one register (presumably 0x8, 0x9, 0xa, 0xb are offsets into some set of registers), I assume the ADTG chip later checks each register for each colour channel setting. Each register will control some different property of the hardware. I could easily be wrong; just guesses around how embedded stuff often works. You could test by only setting one and seeing if it affects one colour only (or half of the green pixels). Doesn't matter to me, might be interesting for you.
To illustrate what I mean about registers within ADTG chip, these lines suggest register 0x800c controls if ADTG should skip lines in the sensor when reading it:
/* ADTG2/4[0x800C] = 0: read every line */
adtg_new[2] = (struct adtg_new) {6, 0x800C, 0};
That only needs one line, because you either skip lines or you don't. For colour related stuff, since ADTG (seems to) give the ability to affect each colour channel separately, you can set four offsets / registers if you want to affect all four colour channels. Perhaps this is where you're getting confused and what your references to 1 vs 4 mean?
The switch / case code is quite hard to read due to the funky indenting
I guess the file has mixed tabs and spaces
