JPCORE Hacking 4:2:2?

Started by 1%, August 11, 2012, 06:11:04 PM

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1%

JPCORE is fairly interesting but not many have looked at it yet.

Seems to have configs at 0x6CE0... is this like a new MVR config?
Does it control qscale? Related to both pics and video...

; 0xff1e2404: pointer to 0x6CE0 (aAJ_JpcoreSliceqpdD_Qscale_0x00_to_0x20)

NSTUB(0xFF1E2B3C, AJ_setup_JpcoreSliceqpdD_Qscale_in_struct)


NSTUB(0xFF1E32A0, AJ_struct_0xC0E10000)

NSTUB(0xFF1E3768, AJ_struct_0x8FB8_p2)

NSTUB(0xFF1E3A78, AJ_JPCORECMP)

Only for photos or do we have 4:2:2 already, untapped?

NSTUB(0xFF1E3BC0, AJ_JPCORE_SetEncodeYuv422LosslessParam)
NSTUB(0xFF1E3AE8, SetEncodeLosslessParam)

All paramaters in here?

NSTUB(0xFF1E3310, AJ_JPCORE_SetEncodeH264Parameter)


Maybe GH2 can be beaten after all?


Jpcore H.264 Parameters:

; *'[JPCORE] SetEncodeH264Parameter 0 %d,%d,%d'
; *'[JPCORE] JP62_SIZER %#lx'
   ?
FF1E3568:   e28f2f47    add   r2, pc, #284   ; *'[JPCORE] JP62_SEQCR1 %#lx'
*'[JPCORE] JP62_PICCR1 %#lx'
*'[JPCORE] JP62_MISCR %#lx'
*'[JPCORE] H264_SPS_PPS JP62_OPMR3 %#lx'
; *'[JPCORE] JP62_SLCR1 %#lx'
*'[JPCORE] JP62_SLCR2 %#lx'


More: ff1e2000.htm

This is controlling the hardware encoder, is it not?

Jpcore is also present on other cameras and CHDK has been changing things in it.

ilguercio

I'm waiting for the best to come :D
Canon EOS 6D, 60D, 50D.
Sigma 70-200 EX OS HSM, Sigma 70-200 Apo EX HSM, Samyang 14 2.8, Samyang 35 1.4, Samyang 85 1.4.
Proud supporter of Magic Lantern.

Chucho

I don't think 422 is possible in baseline coding. If you trace back SetEncodeYuv422LosslessParam it goes back to TTJ RAW and TTJ MRAW, SetEncodeYuv420Losslessparam traces back to TTJ SRAW

1%

So Sraw is only 4:2:0? Couldn't we patch the profile out? Or is it hard-coded to the encoder? Or is it just settings fed to it? I have to look through FW and see what is related to profile.

We should load up the Jpcore structs and see what all the variables are like with mvr config and then change them.

1%

Heh, good? news everyone. In 2009 someone identified FPGAs loading bins in FW. Nobody looked real hard but FPGAs are for things like encoding/crunching numbers etc.

For 5dmk 2.
http://chdk.setepontos.com/index.php/topic,2750.msg30613.html#msg30613

They used:
bitstream 0: Xilinx Spartan-3E XC3S250E
bitstream 1: Xilinx Spartan-3E XC3S100E


If those are the real FPGAs they have decent docos. So I looked in 600D firmware all excited.

Camera can load/dump more than just autoexec.bin i.e

FF316D68:   'B:/CrwParam.bin'    FF316AEC
'B:/CF_Test.bin'

No mention of baseline profile except for decoding, but no mention of FPGA.

FF2F7C38:   '\tSetConvertParameterForDecodeBaseline '


What is: FF2F7C60:   '[ThbDec] XA= %d'
or ThbEnc


And we have: NSTUB(0xFF2F6334, AJ_SetParameterH264Device)


Its not the TX19A, it only does file I/O. I don't think its the DigicIV either. We see the camera writing atoms and files but never the actual encoding, as far as I know.

If we look at FPGA bin file, which maybe can be loaded from card (at least on 5dmk2 and 50d) maybe we can encode however we want, hopefully on 600D as well.

What do you think?


*
Is this encoder config:

NSTUB(0xFF2F65AC, AJ_struct_0x38C4C)

If we're using Ti DMSoC


Encoder already written too.....
http://sourceforge.net/projects/divilinempeg-4/


http://www.ti.com/product/tms320dm368


http://www.ti.com/lit/ds/symlink/tms320dm368.pdf

From the docos this thing is pretty powerful. Supports MPEG2, MJPEG, H.264.... 4:2:2 color.


... Also another idea.. Could Digic just be a custom version of the above?

ilguercio

You can see all the electronic stuff in my detailed picture of my 50D in the apposite section of the wikia.
Yes, there seems to be one of those Xilinx chip and you can also spot more stuff around.
So what do you think? Can you be more practical? :D
Canon EOS 6D, 60D, 50D.
Sigma 70-200 EX OS HSM, Sigma 70-200 Apo EX HSM, Samyang 14 2.8, Samyang 35 1.4, Samyang 85 1.4.
Proud supporter of Magic Lantern.

Chucho

Maybe you can find some usefull information by debuging. By calling NSTUB(0xFF28357C, lvdbg_enablelog) you get a .GRO file along with your movie file. I still don't know how to dissembler the .GRO file any ideas would help. I still haven't try lvdbg_printmember. I'm working with a 600d.

1%

I'll try to call it and look at the GRO

Here are some:

http://d01.megashares.com/dl/OSQmQaC/MVI_1223.GRO

http://d01.megashares.com/dl/NlkwHUN/MVI_1222.GRO

In case that host sucks.
http://www.qfpost.com/file/d?g=tgCFkyLou

Things repeat inside but no strings:

00 FF FF 00 00 00 00 98 08 00 00 60 00 1E 04 04 00 00 00 65 2B 60 56 58 00 00

it is Gero data... whatever that is.

Many debugging things in :

ff276000.htm

KarateBrot

sweet jesus.... this is/might be great
If you donate a RED EPIC to me you officially are very cool ;)

1%

QuoteCan you be more practical?


Rewrite FPGA bin to encode at high profile and use the 4:2:2 color data that can already be generated... i.e in the LV buffer. Even raw cuts our color space, wtf canon. I'd settle for 5 raw burst at 4:2:2 vs 10 raw at 4:2:0... we have plenty of ram for this.


look at ff1c8000.htm

stuff like:

Function start: str:SetParameterH264Encode_PassNo
NSTUB(0xFF1C8DD4, str:SetParameterH264Encode_PassNo)


http://www.cardinalpeak.com/blog/?p=878

NSTUB(0xFF1C90B0, AJ_H264E_OperateNalUnit_fGetSpsPps)

ilguercio

Canon EOS 6D, 60D, 50D.
Sigma 70-200 EX OS HSM, Sigma 70-200 Apo EX HSM, Samyang 14 2.8, Samyang 35 1.4, Samyang 85 1.4.
Proud supporter of Magic Lantern.

Chucho

In the 600d dump in function 0xFF42B29C just before it branches to SetEncodeH264Parameter there is a table for all the available resolution for the h264 encoder. 160, 120, 160, 120, 320, 240, 320, 240, 640, 480, 640, 480, 1024, 768, 1280, 720, 640, 480, 1024, 768, 1920, 1088. This table is the same for 50d, 5d2, 500d, 7d, 60d, 600d and 5d3.

ilguercio

Quote from: Chucho on August 13, 2012, 08:23:08 AM
In the 600d dump in function 0xFF42B29C just before it branches to SetEncodeH264Parameter there is a table for all the available resolution for the h264 encoder. 160, 120, 160, 120, 320, 240, 320, 240, 640, 480, 640, 480, 1024, 768, 1280, 720, 640, 480, 1024, 768, 1920, 1088. This table is the same for 50d, 5d2, 500d, 7d, 60d, 600d and 5d3.
8)
Canon EOS 6D, 60D, 50D.
Sigma 70-200 EX OS HSM, Sigma 70-200 Apo EX HSM, Samyang 14 2.8, Samyang 35 1.4, Samyang 85 1.4.
Proud supporter of Magic Lantern.

nanomad

Add the 1100D to the group  8)
EOS 1100D | EOS 650 (No, I didn't forget the D) | Ye Olde Canon EF Lenses ('87): 50 f/1.8 - 28 f/2.8 - 70-210 f/4 | EF-S 18-55 f/3.5-5.6 | Metz 36 AF-5

1%

Wonder if we can record 1920x1920 with some changes.

I'm going to try to copy that JPcore struct and define all of the pointers. I put in deblocking filter setting. Let me know if it makes a difference or if its wrong: https://bitbucket.org/OtherOnePercent/tragic-lantern



nanomad

IIRC that is the encoder profile, so we can't "record" at 1920x1920...
All it does is probably up/down scaling
EOS 1100D | EOS 650 (No, I didn't forget the D) | Ye Olde Canon EF Lenses ('87): 50 f/1.8 - 28 f/2.8 - 70-210 f/4 | EF-S 18-55 f/3.5-5.6 | Metz 36 AF-5

1%

Have to see what is actually sent to the FPGA/Encoder and what is programmed in its bin.


How do I set gop size? I can't find the function except for the one that just changes all of the settings in one fell swoop. I don't think my decompile got done all the way:

FF1CA6DC:   '_GopSize = %d'
FF04E1EC:   'mvrChangeAckCBR : Video - Mode=%d, Type=%d, Rate=%d, GOP=%d'

I find this but no function to set it.

Where is the actual gop length funtion, not gop options.


All I found in the JPcore struct so far:


0x6CE0  <=41 '[JPCORE] JP62_SLCR1 %#lx', OR(7, 65536*BYTE
(aAJ_JpcoreSliceqpdD_Qscale_0x00_to_0x20.off_0)))
/*0x6CE1*/ 6/-6 db Alpha Also? JP62_SLCR2 %#lx', OR(256*BYTE
(aAJ_JpcoreSliceqpdD_Qscale_0x00_to_0x20.off_0x1 /*0x6CE1*/), 0x1000*BYTE
(aAJ_JpcoreSliceqpdD_Qscale_0x00_to_0x20.off_0x2 /*0x6CE2*/)))
/*0x6CE2*/ 6/-6 db Beta - Set from alpha?
/*0x6CE3*/ - <= 51  [JPCORE] PICQPY %d, PICQPC %d JP62_PICCR1 %#lx', OR(OR(BYTE
(aAJ_JpcoreSliceqpdD_Qscale_0x00_to_0x20.off_0x3 /*0x6CE3*/), 256*BYTE
(aAJ_JpcoreSliceqpdD_Qscale_0x00_to_0x20.off_0x4 /*0x6CE4*/)), 65536))
/*0x6CE4*/ - <= 12 
/*0x6CEC*/
/*0x6CE8*/
/*0x6CF0*/
/*0x6CF4*/
/*0x6CF8*/ = 1
/*0x6CFC*/ -?

/*0x6D00*/ J_IntrStatus_n_JP62_INTSR_IEVCPLT_BITON

/*0x6D04*/
/*0x6D08*/
/*0x6D0C*/
/*0x6D10*/



/*0x6D1C*/ -
/*0x6D14*/ - From Set Lossless
/*0x6D18*/ - /*NE*/ 175, 239,
/*0x6D20*/ - 
/*0x6D24*/
/*0x6D2C*/ - Power Related?
/*0x6D30*/ -Power Related?
/*0x6D34*/
/*0x6D38*/ - Last Address I saw.


Chucho

My really wild guess
mvrSetGopOptSizeFULLHD (3833856, 3309568, 2785280, 2260992, 1736704)

1%

That is gop opts I think... too many variables..

Anyways I found gop size proper in MVR config:

DryosDebugMsg(47, 22, '_GopSize = %d', mvr_config.off_0x110 /*0x63A0*/)

But... calculations are done on it with other variables:

str:_GopSize__IOptSize2__POptSize2_DBF_A_DBF_B+32: sub_FF1CA690(arg1, arg2, arg2, arg3)
str:_GopSize__IOptSize2__POptSize2_DBF_A_DBF_B+36: div_maybe(arg1, arg2)
str:_GopSize__IOptSize2__POptSize2_DBF_A_DBF_B+56: sub_FF1CA43C(mvr_config.off_0x110 /*0x63A0*/, arg2, arg2, arg3)
str:_GopSize__IOptSize2__POptSize2_DBF_A_DBF_B+92: sub_FF1CA344(mvr_config.off_0x110 /*0x63A0*/, HALFWORD(mvr_config.off_0x2 /*0x6292*/), (mvr_config.off_0x118 /*0x63A8*/)->off_0x8, mvr_config.off_0x114 /*0x63A4*/)
str:_GopSize__IOptSize2__POptSize2_DBF_A_DBF_B+112: sub_FF1CA388(mvr_config.off_0x110 /*0x63A0*/, HALFWORD(mvr_config.off_0x2 /*0x6292*/), (mvr_config.off_0x118 /*0x63A8*/)->off_0x8, 1 + mvr_config.off_0x114 /*0x63A4*/)
str:_GopSize__IOptSize2__POptSize2_DBF_A_DBF_B+120: sub_FF1CA37C(mvr_config.off_0x110 /*0x63A0*/, HALFWORD(mvr_config.off_0x2 /*0x6292*/), (mvr_config.off_0x118 /*0x63A8*/)->off_0x8, 1 + mvr_config.off_0x114 /*0x63A4*/)
str:_GopSize__IOptSize2__POptSize2_DBF_A_DBF_B+136: sub_FF1CA370(mvr_config.off_0x110 /*0x63A0*/, HALFWORD(mvr_config.off_0x2 /*0x6292*/), -mvr_config.off_0x120 /*0x63B0*/ + (mvr_config.off_0x118 /*0x63A8*/)->off_0x8, mvr_config.off_0x114 /*0x63A4*/)
str:_GopSize__IOptSize2__POptSize2_DBF_A_DBF_B+156: sub_FF1CA388(mvr_config.off_0x110 /*0x63A0*/, HALFWORD(mvr_config.off_0x2 /*0x6292*/), -mvr_config.off_0x120 /*0x63B0*/ + (mvr_config.off_0x118 /*0x63A8*/)->off_0x8, -1 + mvr_config.off_0x114 /*0x63A4*/)
str:_GopSize__IOptSize2__POptSize2_DBF_A_DBF_B+164: sub_FF1CA37C(mvr_config.off_0x110 /*0x63A0*/, HALFWORD(mvr_config.off_0x2 /*0x6292*/), -mvr_config.off_0x120 /*0x63B0*/ + (mvr_config.off_0x118 /*0x63A8*/)->off_0x8, -1 + mvr_config.off_0x114 /*0x63A4*/)


I updated some MVR config stuff.

*looked at gop size... its constantly changing.. probably being calculated from other variables like a0/ a4/a3, etc.

Tried altering the things that calculate gop but they do not change...

Now a new info... d1 and d2 are same as 2 of the gop values.

786432 is the longest gop I can make.  Gop opts are I think gop size.

Even though D is changed and stays changed:

Format settings, GOP                     : M=1, N=12

All videos still show same gop size/length with mediainfo.


  39:   873.051 [SHTP] Regist RPC Handler Master ALO
     40:   934.528 [MR] mvrChangeAckCBR : Video - Mode=0, Type=0, Rate=24, GOP=12
     41:   934.614 [MR] mvrChangeAckCBR : Sound Off
     42:   934.639 [MR] mvrChangeAckCBR : AE_MODE_MOVIE(3)
     43:   934.654 [MR] mvrChangeAckCBR : ISO(0)
     44:   934.736 [MR] mvrChangeAckCBR : MOVIE_REC_VOLUME(L:32 R:32)
     45:   934.782 [MR] mvrChangeAckCBR : WindCut Off
     46:   942.620 [LV] [GMT] PROP_TEMP_STATUS : STATUS_NORMAL
     47:   947.973 [HPC] ReserveHPCopySingleChannel (2, 117)
     48:   948.231 [LV] InitializeLiveViewDefectDetection
     49:   974.921 [MD] Init RCh1=0, RCh2=0
     50:   975.508 [MD] Set RCh1=d, RCh2=18
     51:   975.926 [STARTUP] startupPrepareRemote
     52:   984.593 [PTP] Not Setting CFn MirrorUpState
     53:   984.908 [PTP] PhotoStudioMode:0
     54:   986.963 [PTP] PROP_OPTICAL_CORRECT_PARAM Size:1aeb0 f3c
     55:   995.516 [RMT] PROP_CONNECT_TARGET (0x0 <= 0x0)
     56:   995.850 [MAC] MAC_Initialize
     57:   996.223 [MAC] K_BOARDID4
     58:   996.269 [MAC] K_BOARDID3
     59:   996.308 [MAC] K_BOARDID2
     60:   996.338 [MAC] K_BOARDID1
     61:   996.639 [MAC] Key=0x6 Board=0x651a1a87 Body=0xc4f73766
     62:   997.076 [PTP] PSI DisconnectViewFinder
     63:   997.339 [PTP] PROP_CONNECT_TARGET (0x0 <= 0x0)
     64:   997.454 [PTP] PROP_CONNECT_TARGET_WFT (0x0 <= 0x0)
     65:   998.086 [MAGIC] SetPtpTransportResources:0,3218
     66:  1009.539 [FC] _FC_OpenCatalog : wNumOfDir 1
     67:  1024.062 [SEQ] seqEventDispatch (Startup, 4)
     68:  1024.360 [DP] DP_Initialize()
     69:  1025.196 [DP] Std T_PrintPage[0] T_PrintNo[0] R_PrintNo[0]
     70:  1025.250 [DP] Std C_PrintNo[0] C_PrintPage[0], C_Copies[0]
     71:  1025.349 [DP] Dp_SetPD_RegistApi Prev:0 New:0
     72:  1025.751 [DP] PROP_CONNECT_TARGET [0x00000000]
     73:  1025.914 [DP] RD_Cancel No Issue
     74:  1026.278 [DP] [GYO]DpFunctionList[0x10117fff]
     75:  1026.420 [DP] X FreeMem Address[0x00000000]
     76:  1026.865 [INDEV] INDEV_Initialize
     77:  1051.766 [IMPP] H264E InitializeH264EncodeFor1080pDZoom
     78:  1051.872 [IMPP] H264E InitializeH264EncodeFor1080p25fpsDZoom
     79:  1073.864 [MR_MOV] (Empty Func) MVW_RegisterXmpDataCallback
     80:  1075.124 [HDMI] HPD OFF
     81:  1075.217 [HDMI] [EDID] dwVideoCode = 0
     82:  1075.257 [HDMI] [EDID] dwHsize = 0
     83:  1075.295 [HDMI] [EDID] dwVsize = 0
     84:  1075.327 [HDMI] [EDID] ScaningMode = EDID_NON_INTERLACE(p)
     85:  1075.360 [HDMI] [EDID] VerticalFreq = EDID_FREQ_60Hz
     86:  1075.391 [HDMI] [EDID] AspectRatio = EDID_ASPECT_4x3
     87:  1075.425 [HDMI] [EDID] AudioMode = 0
     88:  1075.454 [HDMI] [EDID] ColorMode = EDID_COLOR_RGB
     89:  1075.659 [HDMI] DisconnectHDMI : Not Connected
     90:  1079.029 [STARTUP] TotalSizeOfMemory : 0x8b0000 (8896KB)
     91:  1079.133 [STARTUP] GetFreeSizeOfMemory : 0x17eb58 (1530KB)
     92:  1079.341 [STARTUP] GetSizeOfMaxRegion : 0x1797e4 (1509KB)
     93:  1097.380 WARN [LVDS] First Get DTS_GetAllRandomData
     94:  1099.568 [DP] DP_RegisterCBR() Id=1 Count:12
     95:  1099.624 [DP] DP_RegisterCBR() Id=2 Count:12
     96:  1099.652 [DP] DP_RegisterCBR() Id=4 Count:12
     97:  1107.689 [GUI] MainEventHandler PROP_QR_DIDNOT_EXECUTE(0)(0)
     98:  1109.006 [GUI] MainEventHandler PROP_ERROR_FOR_DISPLAY(0)
     99:  1111.505 [SEQ] seqEventDispatch (Startup, 5)
    100:  1111.536 [STARTUP] startupInitializeComplete
    101:  1111.667 [MC] cam event guimode comp. 0
    102:  1114.344 [FA] ChangeCBR(ID=0x8003000a)
    103:  1116.739 [FA] RequestFromCheckData
    104:  1117.335 [FA] MpuMonSpecificFromPartner : COM_FA_CHECK_FROM 0
    105:  1124.502 [SEQ] seqEventDispatch (Startup) : End
    106:  1155.082 [MR] mvrChangeAckCBR : Video - Mode=0, Type=0, Rate=24, GOP=12
    107:  1156.102 [GUI] MainEventHandler PROP_LV_OUTPUT_DEVICE(0)
    108:  1157.383 [MC] cam event guimode comp. 0
    109:  1161.576 [MR] mvrChangeAckCBR : Video - Mode=0, Type=0, Rate=24, GOP=12
    110:  1195.818 [WINSYS] Zlib maxsize update 884
    111:  1195.884 [WINSYS] Zlib maxsize update 1396
    112:  1306.084 [DISP] Enable Pb 1 (2149)
    113:  1427.069 [DISP] TurnOnDisplay finish Type=0
    114:  1463.655 [PTP] ptpDpsCtginfoCheckCompleteCBR[42][0][2]
    115:  2356.234 [MR] mvrChangeAckCBR : Video - Mode=0, Type=0, Rate=24, GOP=12
    116:  2357.618 [MR] mvrChangeAckCBR : AE_MODE_MOVIE(3)
    117:  2365.131 [MR] mvrChangeAckCBR : ISO(96)
    118:  2442.462 [GUI] changeForceMovieStartMode F->T (0)
    119:  2479.086 [LV] [LVAE] EP_SetControlBv() >> EP_ControlBv:1
    120:  2483.931 WARN [LVDS] First Get DTS_GetAllRandomData
    121:  2484.702 [LV] [PATH] GetPathDriveInfo[0]
    122:  2485.049 WARN [LVDS] First Get DTS_GetAllRandomData
    123:  2485.506 WARN [LVDS] First Get DTS_GetAllRandomData
    124:  2487.924 [CAPD] ImagePowerOn
    125:  2512.097 WARN [LVDS] First Get DTS_GetAllRandomData
    126:  2513.000 WARN [LVDS] First Get DTS_GetAllRandomData
    127:  2513.100 WARN [LVDS] First Get DTS_GetAllRandomData
    128:  2522.460 WARN [LVDS] First Get DTS_GetAllRandomData
    129:  2522.541 [LV] [EVF] ShootingMode(2), FrameRate(5)
    130:  2522.566 [LV] [EVF] Flicker Detect!!!
    131:  2557.077 [DISP] Disable Pb 0 (2078)
    132:  2557.167 [DISP] TurnOffDisplay finish Type=0
    133:  2568.695 [LV] [PATH] GetPathDriveInfo[0]
    134:  2594.006 [GUI] MainEventHandler PROP_LV_OUTPUT_DEVICE(1)
    135:  2613.988 [LV] [EVF] Flicker Detect!!!
    136:  2636.302 [LV] [EVF] Flicker Detect!!!
    137:  2681.728 [LV] [EVF] Flicker Detect!!!
    138:  2727.180 [LV] [EVF] Flicker Detect!!!
    139:  2759.392 [LVCDEV] DF 43Hz:   0 50Hz:   6 60Hz:   1 74Hz:   1
    140:  2772.596 [LV] [EVF] Flicker Detect!!!
    141:  2812.359 [MR] mvrFixQScale FIX_QSCALE(0:VBR, 1:FIX) = 0
    142:  2812.580 [MR] mvrSetDeblockingFilter (alpha = 6, beta = 7)
    143:  2818.029 [LV] [EVF] Flicker Detect!!!
    144:  2849.116 [LVCDEV] DF 43Hz:   0 50Hz:   1 60Hz:   4 74Hz:   1
    145:  2863.490 [LV] [EVF] Flicker Detect!!!
    146:  2908.919 [LV] [EVF] Flicker Detect!!!
    147:  2940.979 [LVCDEV] DF 43Hz:   4 50Hz:  53 60Hz:   5 74Hz:   0
    148:  2954.365 [LV] [EVF] Flicker Detect!!!
    149:  2999.814 [LV] [EVF] Flicker Detect!!!
    150:  3031.215 [LVCDEV] DF 43Hz:  13 50Hz:  13 60Hz:  16 74Hz:   0
    151:  3045.278 [LV] [EVF] Flicker Detect!!!
    152:  3090.713 [LV] [EVF] Flicker Detect!!!
    153:  3122.881 [LVCDEV] DF 43Hz:   0 50Hz:   0 60Hz:   0 74Hz:   0
    154:  3123.003 [LVCDEV] Flicker Detect Complete:0
    155:  3161.556 [LV] [PATH] GetPathDriveInfo[10]
    156:  3458.232 [DISP] Enable Pb 1 (2149)
    157:  3594.318 [DISP] TurnOnDisplay finish Type=0
    158:  3807.715 [MR] mvrFixQScale FIX_QSCALE(0:VBR, 1:FIX) = 0
    159:  3807.951 [MR] mvrSetDeblockingFilter (alpha = 6, beta = 7)
    160:  4809.229 [MR] mvrFixQScale FIX_QSCALE(0:VBR, 1:FIX) = 0
    161:  4809.455 [MR] mvrSetDeblockingFilter (alpha = 6, beta = 7)
    162:  5077.713 [STARTUP] too heavy... free : 999KB
    163:  5454.356 [MP] MVP_CancelMoviePlay
    164:  5454.494 [BIND] EVENTID_METERING_START
    165:  5594.373 [BIND] EVENTID_METERING_TIMER_START
    166:  5807.780 [MR] mvrFixQScale FIX_QSCALE(0:VBR, 1:FIX) = 0
    167:  5808.010 [MR] mvrSetDeblockingFilter (alpha = 6, beta = 7)
    168:  6807.762 [MR] mvrFixQScale FIX_QSCALE(0:VBR, 1:FIX) = 0
    169:  6807.999 [MR] mvrSetDeblockingFilter (alpha = 6, beta = 7)
    170:  7600.893 [MP] MVP_CancelMoviePlay
    171:  7601.037 [BIND] EVENTID_METERING_START
    172:  7777.190 [BIND] EVENTID_METERING_TIMER_START
    173:  7850.295 [MR] mvrFixQScale FIX_QSCALE(0:VBR, 1:FIX) = 0
    174:  7850.532 [MR] mvrSetDeblockingFilter (alpha = 6, beta = 7)
    175: 11156.805 [STARTUP] too heavy... free : 999KB
    176: 16600.321 [MP] MVP_CancelMoviePlay
    177: 16600.469 [BIND] EVENTID_METERING_START
    178: 16756.043 [BIND] EVENTID_METERING_TIMER_START
    179: 16909.138 [MR] mvrFixQScale FIX_QSCALE(0:VBR, 1:FIX) = 0
    180: 16909.371 [MR] mvrSetDeblockingFilter (alpha = 6, beta = 7)
    181: 17191.443 [STARTUP] too heavy... free : 999KB
    182: 17775.585 [EM] emLockControl (TYPE_REQUEST = 131, 0x17f)
    183: 17775.621 [EM] RequestLock [ID = 131, 0x0 -> 0x17f]
    184: 17775.655 [EM] emLockHandler (0x0 => 0x7f)
    185: 17776.378 [EM] AcceptLock [ID = 131, 0x0 -> 0x17f]
    186: 17776.420 [EM] emLockControl (TYPE_ACK SUCCESS = 0x7f, 0x17f)
    187: 17777.856 [MR] MVR_StartRecord
    188: 17777.955 [MR] mvrRecStart
    189: 17780.264 [FCACHE] fcacheRequestRemoveFileCacheItem (1, Num = 0)
    190: 17781.569 [MR] mvrMovWorkCallback (0x48000070)
    191: 17784.873 [MR] mvrMovStreamCallback (0x4a000070)
    192: 17967.579 [JOB] RecMovie Start
    193: 18011.685 [MR] mvrFirstExposure
    194: 18022.250 [JOB] GetCurrentDcsParam (Drive = 2, Pict = 0x10000, CurPict = 0x10000)
    195: 19084.367 [FW] fwSetUnitSize (0x2000)
    196: 19111.242 [EM] emLockControl (TYPE_REQUEST = 131, 0x0)
    197: 19111.283 [EM] RequestLock [ID = 131, 0x17f -> 0x0]
    198: 19111.322 [EM] emLockHandler (0x7f => 0x0)
    199: 19113.684 [EM] AcceptLock [ID = 131, 0x17f -> 0x0]
    200: 19113.732 [EM] emLockControl (TYPE_ACK SUCCESS = 0x0, 0x0)
    201: 19447.903 [MR_MOV] Write : End(1) ( 6397KB/S)
    202: 19448.483 [FW] fwSetUnitSize (0x200000)
    203: 20085.284 [FW] fwSetUnitSize (0x2000)
    204: 20499.121 [MR_MOV] Write : End(2) ( 7077KB/S)
    205: 20499.170 [FW] fwSetUnitSize (0x200000)
    206: 21086.425 [FW] fwSetUnitSize (0x2000)
    207: 21460.014 [MR_MOV] Write : End(3) ( 7872KB/S)
   


Maybe can make a change to:

[MR] mvrChangeAckCBR : Video - Mode=0, Type=0, Rate=24, GOP=12

http://chdk.setepontos.com/index.php?topic=7067.15

1%

Did Canon license an encoder like this from xilinx?

h264_cabac_ds603.pdf


http://ebookbrowse.com/h264-cabac-ds603-pdf-d38631827

ilguercio

Well, 50D has got a Xilinx 3S250E onboard, i don't know if this can help you.
What does this thing do?
What does Digic CH4-6405 and those 2 CH4-6409 chips do?
Canon EOS 6D, 60D, 50D.
Sigma 70-200 EX OS HSM, Sigma 70-200 Apo EX HSM, Samyang 14 2.8, Samyang 35 1.4, Samyang 85 1.4.
Proud supporter of Magic Lantern.

1%

I dunno... my guess ADC/controller for the sensor. Chipworks will sell you photos of the sliced up IC.


The PDF is a h264 encoder that runs on that xilinx chip. 50d and 5d2 load bin with software or config to it. If we install different software we can swap out the encoder to whatever we want. At the least we find out what encoder is running on it already and change its settings. Is FPGA the same accross all cameras? Maybe we can install 5dmkIII's encoder. Xilinx stuff is pretty well documented AFAIK, they gave out dev boards.


ilguercio

We don't have all the cameras' FPGA available, i guess.
My pics of the 50D's motherboard are these:
http://dl.dropbox.com/u/1087972/50D%20internal/IMG_1413.JPG
http://dl.dropbox.com/u/1087972/50D%20internal/IMG_1421.JPG
Note this picture here from another 50D, what's that "new" connector on the top right corner (next to the HDMI port) ?
http://dl.dropbox.com/u/1087972/50D%20internal/IMG_9748.JPG
That isn't on my 50D.
Can we try to load different bin files?
Canon EOS 6D, 60D, 50D.
Sigma 70-200 EX OS HSM, Sigma 70-200 Apo EX HSM, Samyang 14 2.8, Samyang 35 1.4, Samyang 85 1.4.
Proud supporter of Magic Lantern.

1%

 Not sure on your connector. Try to find a service manual... its probably related to that or a peripheral connector.

I don't have the startup routines part of the firmware, only from OS start. The FPGA parts are in there, I don't know if the bin is or just a reference to it. The FPGA has other modes for software loading, debugging. There is reference to debugging console stuff in the canon FW around the encoder code.

I think camera feeds frames to FPGA for encoding from JPcore (in digic?) which does the "canony" image stuff to them like it would to jpegs. Would that account for the 4:2:0 from yuv 4:2:2 loss? So can we just feed YUV to our own encoder running on FPGA with some hacks?

competitor's core:

http://fpgablog.com/posts/h264-fpga-asic/

nanomad

Quote from: ilguercio on August 15, 2012, 04:27:11 AM

Note this picture here from another 50D, what's that "new" connector on the top right corner (next to the HDMI port) ?
http://dl.dropbox.com/u/1087972/50D%20internal/IMG_9748.JPG
That isn't on my 50D.

It's not a new connector, it looks unsoldered on your board
EOS 1100D | EOS 650 (No, I didn't forget the D) | Ye Olde Canon EF Lenses ('87): 50 f/1.8 - 28 f/2.8 - 70-210 f/4 | EF-S 18-55 f/3.5-5.6 | Metz 36 AF-5

ilguercio

Quote from: nanomad on August 15, 2012, 09:55:24 AM
It's not a new connector, it looks unsoldered on your board
That's what i meant. The board of the second picture should be of a more recent batch as the serial number says.
Wonder why the latter has that connector and what it does while my board doesn't have it.
Canon EOS 6D, 60D, 50D.
Sigma 70-200 EX OS HSM, Sigma 70-200 Apo EX HSM, Samyang 14 2.8, Samyang 35 1.4, Samyang 85 1.4.
Proud supporter of Magic Lantern.

nanomad

If it is not connected to anything it is probably used during the assembly, maybe to upgrade the firmware of some component
EOS 1100D | EOS 650 (No, I didn't forget the D) | Ye Olde Canon EF Lenses ('87): 50 f/1.8 - 28 f/2.8 - 70-210 f/4 | EF-S 18-55 f/3.5-5.6 | Metz 36 AF-5

g3gg0

to be honest...
i am quite sure those FPGAs seen on some older models dont have to do anything with MPEG encoding.
to me it looks as if the FPGA is for managing access to the external memory bus, maybe SDRAM controller, maybe HDMI interface etc.

but for H.264 encoding, the XA3S250E has far to few processing power.
the IP core you mentioned needs ~8k slices for NTSC/PAL videos. this FPGA has less than 2.5k.
for 720p we would need a virtex-4 instead of a spartan-3E and ~9k slices.

i am sure the digic has some built-in asic for mpeg encoding.
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1%

It is possible its a memory controller as you're right it isn't that powerful. The other people's encoder claims better specs but they said soon for spartan 3.  The referenced one is also CABC

One way to check for sure is to look at those bins and see if the contents is there and if its encoder settings or memory settings.

Why is TMS320DM36x from TI mentioned in data sheets? IF the ASIC is on the digic chip can it be set to a different profile?

Is our encoder CABAC or CAVLC? One of them needs less CPU I think.

g3gg0

Quote from: 1% on August 15, 2012, 04:42:25 PM
One way to check for sure is to look at those bins and see if the contents is there and if its encoder settings or memory settings.

Why is TMS320DM36x from TI mentioned in data sheets? IF the ASIC is on the digic chip can it be set to a different profile?

which binaries do you mean?
in which datasheets is the TMS320 mentioned?

br,
g3gg0
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1%

http://magiclantern.wikia.com/wiki/Datasheets

Mentions that IC which does multi format. You're right tho, that spartan is not very powerful. 65nm process on digic has  alot of room but encoding is still requested from something.

    5d2: K218cfg.bin written at 0xF8760000 in Flash. See CHDK forum
    50d: K261cfg.bin written at 0xF8760000

600D, fpga is gone but mystery chip appears:

http://images.wikia.com/magiclantern/images/1/1f/600D-PCB2.jpg

Looked some more in the firmware, engine writes are used for encoder control?

H264E SetParameterH264Encode PassNo:%d'

Are there multiple passes?

JP62_OPCR_OPINPROG_BITON

This bit is set on. Original Program clock reference

Does this display read/write address of H264 stream?

DryosDebugMsg(0x1a, 0x1, 'H264E RequestH264EncHD r:%#lx,w:%#lx', ret_AJ_something_0xC0F26008_0xC0F04008_FF1C8D6C) => ret_DryosDebugMsg_FF1C8D84
AJ_fIDChecker_n_Eng_IO(0x1) => ret_AJ_fIDChecker_n_Eng_IO_FF1C8D8C


From reading that function it seems Jpeg data is being fed to it vs yuv??

I see:
'H264E JpegEncodeCompleteCallback EncodeSize:%#lx'


Some more interesting stuff, yes probably debug messages:

[JPCORE] SetEncodeH264Parameter P %d,%d,%d'
FF1E3494:   STRING: '[JPCORE] SetEncodeH264Parameter I %d,%d,%d'   
FF1E34C0:   STRING: '[JPCORE] JP62_SLCR1 P %d,%d,%d'

'[JPCORE] SetEncodeH264Parameter 0 %d,%d,%d'


Jpcore:

*'[JPCORE] JP62_SIZER %#lx'
*'[JPCORE] JP62_SEQCR1 %#lx'
*'[JPCORE] JP62_PICCR1 %#lx'
'[JPCORE] JP62_MISCR %#lx'
'[JPCORE] H264_SPS_PPS JP62_OPMR3 %#lx'
*'[JPCORE] JP62_OPMR3 %#lx'
[JPCORE] JP62_SLCR1 %#lx'
*'[JPCORE] JP62_SLCR2 %#lx'

Maybe we should monitor these values and see what they say when changing video modes/sizes. They should all be related to the encode... but then how do you change them? Does canon set this all at startup or at every movie start?

1%

How does TI DMS320DM368 address map compare to Digic? TI chip has similar features, including face detection, etc.






I know arm chip is slightly crappier.... it is a 926

Voice codec is mentioned in 600D firmware and docs for DMS320

g3gg0

Quote from: 1% on August 15, 2012, 05:07:42 PM
600D, fpga is gone but mystery chip appears:

which chip do you mean?
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g3gg0

not only the register map differs, but also the meaning of the registers are totally different.
e.g. setting GPIOs or configuring timers is done in a different way as on TMS320
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1%

Hehehe, it was worth a shot, wonder where the idea came from then.. I mean the chip near the digic that looks like the package got cut off. with "hologram" on top.


Also, how do I turn these messages on so they show up in the log?

SetEncodeH264Parameter P %d,%d,%d'
JP62_SLCR1 P %d,%d,%d'


I found this in tramell's old posts

        // increase jpcore debugging
        dm_set_store_level( 0x15, 2 );
       dm_set_store_level( 0x2f, 0x16 );


My buffer dies quick but these are the logs produced.

More engio info than jpgocre info it seems. I think its movie being encoded step by step or at least part of that process.

http://www.qfpost.com/file/d?g=4urpVluQh

1%

Made a couple more logs.

MVR stop at 30 minutes:


311: 45595.878 [MR] mvrRecStop
314: 45600.815 [LV] [PATH] GetPathDriveInfo[10]
315: 45792.921 [MR_MOV] Write : End(19) (21156KB/S)
317: 46043.111 [MR] mvrRecStopped
318: 46043.185 [MR] mvrRecStopped : FreeMemoryResourceForMovieRecWork
319: 46043.498 [MR] mvrRecStopped : End:91905b60



A peep from JPCORE

663448: 36277.602 [ENG] [JPCORE] ERROR Invalid beta 7

Logs:
http://www.qfpost.com/file/d?g=UKLVFiXSJ
http://www.qfpost.com/file/d?g=lxrRIu9Oe

Indy

Hi,

see http://magiclantern.wikia.com/wiki/Register_Map/550D
jpec IC section
see http://magiclantern.wikia.com/wiki/ASM_Dictionary
DEC, JPE...

the ML Wiki contains a lot of information, use its search engine

Indy