Author Topic: DIGIC 7 development (200D/SL2, 800D/T7i, 77D, 6D2)  (Read 290061 times)

kitor

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Re: DIGIC 7 development (200D/SL2, 800D/T7i, 77D, 6D2)
« Reply #400 on: April 30, 2022, 10:03:19 AM »
Unfortunately your beliefs have no backup in any measurable data. We are not even close to any raw capabilities on Digic6+ models, do not expect anything in literally years from now unless a miracle happens.
Too many Canon cameras.

zvonkok

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Re: DIGIC 7 development (200D/SL2, 800D/T7i, 77D, 6D2)
« Reply #401 on: June 17, 2022, 11:55:53 AM »
What is the status of 6D2? I have a background in embedded development and would like to help. I am mostly interested in having a clean HDMI on my 6d2. Thanks.
Asking to not duplicate work.

names_are_hard

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Re: DIGIC 7 development (200D/SL2, 800D/T7i, 77D, 6D2)
« Reply #402 on: June 26, 2022, 06:18:47 AM »
Using MMU patches, I hooked mpu_send() and mpu_recv().  This allowed me to obtain a nice clean log of early MPU messages from 200D.  The same technique will be easy to adapt to all other D7, D8, DX cams.

This should greatly help in improving emulation.  So far I've only logged the very early messages, but in theory this can also log MPU traffic while the camera is exercised, to see how different camera functions work.  Note that the messages as seen by these functions are missing a container layer, so e.g. these two lines (one from my code, one from Qemu logging) are the equivalent message:
Code: [Select]
mpu_send: 06 01 27 00 64 00
[MPU] Received: 08 06 01 24 00 01 00 00  (PROP_CARD2_STATUS - spell #7)
Adding this extra layer for Qemu use looks easy.

The build is from this commit: https://github.com/reticulatedpines/magiclantern_simplified/commit/4d037140ad1c3ea72c16d508de65ddcc13f98a8d

Log (after slight manual cleanup, UART log lines get interlaced sometimes): https://pastebin.com/VmRdvQ9E

names_are_hard

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Re: DIGIC 7 development (200D/SL2, 800D/T7i, 77D, 6D2)
« Reply #403 on: August 15, 2022, 05:33:00 AM »
Dual ISO now works on 200D.  So that's nice.  Process is similar to other cams, but the data format for ADTG / CMOS registers appears different, here are some examples:

Code: [Select]
0b400000 // ISO 100
0b444440 // 1600
0b440400 // Dual ISO, 100/1600
0b455550 // 3200
0b466660 // 6400
0b466660 // 12800, so presumably this is boosted further elsewhere and is non-native ISO

I'm currently assuming this means the data is now 16 bit, and b4 is the register index.  The lower and upper 4 bits are used by some commands.

Danne

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Re: DIGIC 7 development (200D/SL2, 800D/T7i, 77D, 6D2)
« Reply #404 on: August 15, 2022, 08:13:03 AM »
 :o
Nice work!