See reply #41. At first, things appear to make sense, but once you start tweaking some more registers, things are no longer obvious and frequency was guessed from maximum read speed.
The presets I've tried last week (take with a grain of salt; not yet double-checked):
static uint32_t sdr50_700D[] = { 0x3, 0x3, 0x4, 0x1D000301, 0x0, 0x201, 0x201, 0x100, 0x4, 0 }; /* SDR50 values from 700D (96MHz) */
static uint32_t sdr_96MHz_b[] = { 0x3, 0x3, 0x4, 0x1D000301, 0x0, 0x201, 0x201, 0x0, 0x4, 0 };
static uint32_t sdr_80MHz_a[] = { 0x3, 0x3, 0x5, 0x1D000401, 0x0, 0x201, 0x201, 0x0, 0x5, 0 }; /* underclocked values: 80MHz = 96*(4+1)/(5+1) */
static uint32_t sdr_120MHz_a[] = { 0x3, 0x3, 0x3, 0x1D000201, 0x0, 0x201, 0x201, 0x100, 0x3, 0 }; /* overclocked values: 120MHz = 96*(4+1)/(3+1) */
static uint32_t sdr_120MHz_b[] = { 0x3, 0x3, 0x3, 0x1D000201, 0x0, 0x201, 0x201, 0x0, 0x3, 0 };
static uint32_t sdr_132MHz_a[] = { 0x2, 0x2, 0x2, 0x1D000201, 0x0, 0x100, 0x100, 0x100, 0x2, 0 }; /* overclocked values: 132MHz?! */
static uint32_t sdr_132MHz_b[] = { 0x5, 0x2, 0x2, 0x1D000001, 0x0, 0x201, 0x301, 0x100, 0x2, 0 }; /* overclocked values: this one works on SanDisk Extreme Pro 32GB 95MB/s V30 (5D3) */
static uint32_t sdr_132MHz_c[] = { 0x2, 0x2, 0x2, 0x1D000200, 0x1, 0x101, 0x100, 0x10100, 0x10003, 0 };
static uint32_t sdr_160MHz_a[] = { 0x2, 0x3, 0x1, 0x1D000001, 0x0, 0x100, 0x100, 0x100, 0x1, 0 }; /* overclocked values: 160MHz = 96*(4+1)/(2?+1) (found by brute-forcing) */
static uint32_t sdr_160MHz_b[] = { 0x3, 0x3, 0x2, 0x1D000200, 0x1, 0x301, 0x100, 0x10100, 0x10003, 0 };
static uint32_t sdr_160MHz_c[] = { 0x3, 0x3, 0x2, 0x1D000200, 0x1, 0x301, 0x100, 0x10000, 0x10003, 0 };
static uint32_t sdr_160MHz_d[] = { 0x3, 0x3, 0x2, 0x1D000200, 0x1, 0x301, 0x100, 0x0, 0x10003, 0 };