Pixel binning patterns in LiveView

[theBilalFakhouri]

Something I don't understand very well, How does Binning pixels happen? For example in 5D3 it is binning the whole pixels in the sensor to 1920x1280 in video mode so it uses the whole pixels , should this mean that the camera do 5760x3840 @ 24 FPS ? But downscaled to 1920x1080?

How this process works if it reads the whole pixels? And we know the sensor speed is slow . . Short question:
What the difference between Full-Res LiveView in 1x1 sampling (It uses all the pixels in the sensor without Binning) and the Binned 3x3 mode (it uses all pixels too, but with Binning and it can do it in much higher frame rate 30 FPS compared to 7.4 FPS).

What is the pipeline here for each mode?

@a1ex  Can you explain?   

[a1ex]

First post. TLDR - pixel binning happens in analog domain. It's not done digitally.

Pixel readout clocks (FPS timer A and B) are applied after binning.

Pixel binning mode will affect timer A limit on some models, but not by much (it won't change the order of magnitude). IIRC it doesn't happen on 700D, but need to double-check. It does happen on 5D3, e.g. in 3x3 it accepts 398, but in 5x3 it can't go lower than 410.

[ArcziPL]

Register            5D3                   5D2                   6D                   EOS M / 700D         60D                   500D                   1100D
8183 / 1183   0x38 (56 dec)   0x3c (60 dec)   0x35 (53 dec)        0x21 (33 dec)       0x25 (37 dec)   0x1c6 (454 dec)   0x1c7 (455 dec)
8184 / 1184   0x2d (45 dec)   0x3a (58 dec)   0x3b (59 dec)       0x7b (123 dec)        0x21 (33 dec)   0x1c0 (448 dec)   0x1c0 (448 dec)
                     
Resolution         5760 x 3840   5616 x 3744   5472 x 3648         5184 x 3456         5184 x 3456         4752 x 3168         4272 x 2848
 
The register values of the fullframe camera's are close to each other, as is their resolution.
EOS M / 700D are just weird  small 8183 value, big 8184 value.
And both 500D and 1100D have really hit values, why ?
Where is the logic 

Isn't it typical for Canon cams to combine several fields (of arbitrary bitlenght) in one register, like it usually on every microcontroller is? Then you shouldn't analyze the whole register value but the value of each bit or field inside. If the whole is "big" or "small" would mean nothing, as the bits at different positions would have different meaning. But then it would be nice to find out what is the organization of the fields in a reg. Not trivial.

I don't know a big extent of the ML code but so far only seen a combination of two 16-bit words in one 32-bit reg. Anywhere are smaller fields used? Several 8-bit or even smaller, down to 1-bit fields?

Levas, already tried the values from 5D3 on your 6D?

[Levas]

Levas, already tried the values from 5D3 on your 6D?

First thing I tested 

Didn't work, did some more testing at the time, there seems to be some headroom in it, changing the registers by one or two values didn't do much, when changing enough, you get either part of your frame bright and another part stays normal or the whole frame becomes bright. When going to 5x zoom you'll see bright and dark columns.
Couldn't find any logic in it.

[ArcziPL]

changing the registers by one or two values didn't do much, when changing enough, you get either part of your frame bright and another part stays normal or the whole frame becomes bright. When going to 5x zoom you'll see bright and dark columns.
Couldn't find any logic in it.

That's exactly how it would behave if my theory is true, i.e. the register content would consist of a several independent fields. I'd suggest to change single bits in these regs, then maybe changing pairs of neighbouring bits or each nibble (upper and lower half-byte) separately -- it would be great to find out how they are organized. On DIGIC 5 cams these registers seem to be 8-bit wide.

I'll try on my cams.

[ArcziPL]

It's really weird. After playing with these two regs on 700D there are vertical stripes appearing, which stay even after returning to the original values, and then they slowly vanish, which takes several seconds.

But zeoring both in non-cropped mv1080 indeed looks like disabling column binning, as artifacts appear on vertical lines.

[reddeercity]

Found 3 different column/pinning mode on the 50D with cmos[4]

Code: [Select]

1.67x vertical
3.0x vertical
4.5x verticalcurrently , with can't embed photo's anymore ( or I should say there's no button to embed in post)
so I loaded the photo on my bitbucket downloads

Code: [Select]

cmos[4] 0x40c -> 0x2BThis looks right with 1.67x vertical stretch ,  un-stretch frame M21-2361_frame_1.png ,  stretch frame 1.67XVertical-M21-2361_frame_1.png
1568x1764
 

Code: [Select]

cmos[4] 0x40c -> 0x253.0x vertical stretch , un-stretch frame  M21-2357_frame_75.png  ,
stretch 3.0XVertical-M21-2357_frame_75.png
1568x3168
   

Code: [Select]

cmos[4] 0x40c -> 0x344.5x vertical (450%) , Un-stretch frame M22-0003_frame_100.png
stretch frame 4.5XVertical-M22-0003_frame_100.png
1568x4752
   

Attn: Mod. , if you want to change the formatting please go ahead.

[theBilalFakhouri]

These registers controls also line skipping beside 800c
ADTG 8007
ADTG 8008
I didn't find something useful about them

[theBilalFakhouri]

Also these
8075
8076

[reddeercity]

I think I found a 2x pixel binning mode on 5d2 in 5xzoom
playing around with

Code: [Select]

cmos[0] 20f --> 60fStill pretty rough at this point would more reg to clean the edges
So I stated off at 2144 (default 5xzoom) it pushed it to the left and cut off 366 columns to end up with 1778


1778x1075_RAW-0011.png

So I resized the horizontal by 200%  (1778*200% = 3556)

3556x1075_RAW-001_1x2-pinning.png

Just seeing if there a better way to get full HD image in like 3x3 but in 5xzoom for full 16x9 HD 

Edit:
Default 5xZoom (2144x1074)


So It looks like that cmos[0] reg is giving me the full width view in 5xzoom , everything on the right is now viewable
it looks I my be on to something here , need to that a deep dive and see what I do with this .

edit#2:
wondering if I possible found sRAW1 mode (10 megapixel/3861 × 2574 pixels) eos5dm2/specifications.htm
seems awfully close 3556 to 3861 

[reddeercity]

Yes I can get the full width view with CMOS[0] 0x207->0x607 in 5xzoom on 5d2
I pushed the raw size  horizontally to 2752 with the reg set 0x607 and it the full view
width , will close 5504(H) still not prefect by no means there some stair steps lines
but , could be useful .


2752x2034_M19-2358_frame_20.png


5504x2034_M19-2358_frame_21.png

I get around 15fps with 2752x2034  , 1x3 is still more efficient at 1664x1842@23.976fps .
It's interesting that cmos[0] & cmos[2] can control pixel binning .

[2blackbar]

Great find, i hope its not uncompressed mlv thats limiting findings, with eos M its impossible to record uncompressed in such resolutions because of camera card reader/writer speed limitation and lossless was a saviour for this camera.

[theBilalFakhouri]

It seems ADTG2[8000] controls Horizontal Binning/Skipping but only in 1x3 mode, ADTG2[8000] default values is 0x6 in mv1080, tweaking it to 0x5 provide two things:

1x3 Mode with Horizontals Pixel Skipping

Let's set 1x3 mode from ADTG2[800C], 0x2 to 0x0, then tweak ADTG2[8000] from 0x6 to 0x5 back and fourth, you get Horizontals Pixel Skipping/Binning game:

Like Magic

You can't re-bin Horizontal Pixels by ADTG2[8183], you can do the experiment using ADTG2[800C] and ADTG2[8183] without ADTG2[8000], but a quick note, if a register like ADTG2[8000] related to sensor sampling and Binning/Skipping has two effects at once, it might other registers related to Sensor Sampling/Binning/Skipping also have more than one effect, maybe.

[Danne]

I think Levas found out about how reg 8000 affected binning when playing with 3x1 presets. Anyway. 0.6 seems the correct one at least with 1x3 binning:


0x6


0x5

[theBilalFakhouri]

I remember Levas solved Jagged-Lines issue in 3x1 Mode by tweaking ADTG [8000] in x5 mode on 6D, I couldn't solve it back then, but now I have tried again and now it re-solved "Jagged-Lines" for 3x1 on 700D by making these changes:

8183 from 0x21 to 0x0
8184 from 7b to 0x3b

When I tweak ADTG [8000] from 0x6 to 0x5 on 700D, I forced into 1x3 Mode, I can't stay in 3x3 when changing ADTG [8000] from 0x6 to 0x5, so I can't get Horizontals Pixel Skipping in 3x3 unlike the 6D? like the examples you posted above . .

[Danne]

Examples above are for eosm:

Code: [Select]

            case CROP_PRESET_anamorphic_rewired_EOSM:
            case CROP_PRESET_anamorphic_rewired_flv_EOSM:
            case CROP_PRESET_anamorphic_rewired_100D:
                adtg_new[2] = (struct adtg_new) {6, 0x800C, 0 + reg_800c};
                adtg_new[3] = (struct adtg_new) {6, 0x8000, 6};
                adtg_new[17] = (struct adtg_new) {6, 0x8183, 0x21 + reg_8183};
                adtg_new[18] = (struct adtg_new) {6, 0x8184, 0x7b + reg_8184};
                break;

[reddeercity]

Investigating pixel binning on the 5d2 in 3x3 mode with cmos[0], I found out that cmos[0] changes
the pixel binning in 3x3 from 3 line skipping to 1.67 "aka" 720p 60" mode on my 5d2
cmos[0] 0x20b ->60b , because cmos[2](0xe) I can increase the horizontal from 1880 to 2456x940(24.03fps) = 2456x1566 , see image below , frame exported from mlv app.


5d2_2456x940_RAW-044.DNG





5d2_1.67_pixel_7-22-2020_M22-2318_frame_1.png

There needs to be more reg's (atdg to cleanup the edges) but this interesting , FYI it is full view there no crop factor .
This close to the 3x1 but instead of even third line it's 1.67 or so it's I guess it's 5x3 if it was 1880 but horizontal is in 1:1 mode so 5x1 ?
maybe better just to keep it 5x3