CSMgrTask:ff5c4634:1e:01: CSMgrTask: pMessage=0x361a4, pLStorage=0x647a5c
CSMgrTask:ff5c457c:1e:01: MapLogToPhysic: pLStorage=0x647a5c
CSMgrTask:ff5c45a0:1e:01: MapLogToPhysic: SUCCESS(ID=1)
CSMgrTask:ff5c457c:1e:01: MapLogToPhysic: pLStorage=0x647a5c
CSMgrTask:ff5c45a0:1e:01: MapLogToPhysic: SUCCESS(ID=1)
CSMgrTask:ff6bda48:23:03: ---- SDEventHandler(ID=1:Event=8) ----
CSMgrTask:ff6bcb14:23:01: SD_DeviceCreate: StorageID=1, WP=0
CSMgrTask:ff6bcc20:23:01: sdIdentifyDrive Start
CSMgrTask:ff6baeb0:23:01: sdSoftReset( 0 )
CSMgrTask:ff6baf24:23:01: sdSoftReset SUCCESS
CSMgrTask:ff6baf40:23:01: sdTrySendCommand1 Start
CSMgrTask:ff6baf88:23:03: sdTrySendCommand1: Timeout
CSMgrTask:ff6baeb0:23:01: sdSoftReset( 0 )
CSMgrTask:ff6baf24:23:01: sdSoftReset SUCCESS
CSMgrTask:ff6baac0:23:01: sdIdentifyDrive Start
CSMgrTask:ff6bd6e4:23:01: sdSendIFCondition Start
CSMgrTask:ff6bd8f4:23:01: sdSendIFCondition End
CSMgrTask:ff6ba724:23:01: sdSendOCR Start
CSMgrTask:ff6ba864:23:05: sdSendOCR: Hi-Capacity Card
CSMgrTask:ff6ba888:23:05: sdSendOCR: 1.8V Signaling Card
CSMgrTask:ff6baaa4:23:01: sdSendOCR End
CSMgrTask:ff6bab48:23:01: sdAllSendCID Start
CSMgrTask:ff6bac7c:23:01: sdAllSendCID End
CSMgrTask:ff6ba5b0:23:01: sdSendRelativeAddress Start
CSMgrTask:ff6ba6f8:23:01: sdSendRelativeAddress End
CSMgrTask:ff6ba1cc:23:01: sdSendCSD Start
CSMgrTask:ff6ba288:23:03: CsdStructVersion = 1
CSMgrTask:ff6ba2a8:23:03: MMCSpecVersion = 0
CSMgrTask:ff6ba370:23:03: C_SIZE=0x0001d0df READ_BL_LEN=0x0009
CSMgrTask:ff6ba3ac:23:03: *** EraseBlks = 128 ***
CSMgrTask:ff6ba3d0:23:05: CARD CAPACITY is 59504Mbyte( 121864192Sec )
CSMgrTask:ff6ba438:23:01: sdSendCSD End
CSMgrTask:ff6b9df8:23:01: sdSendCID Start
CSMgrTask:ff6b9eac:23:01: ***********************************
CSMgrTask:ff6b9ec4:23:01: MID: 0x41
CSMgrTask:ff6b9ee8:23:01: OID: 0x3432
CSMgrTask:ff6b9f18:23:01: PNM: SD64G
CSMgrTask:ff6b9f38:23:01: PRV: 3.0
CSMgrTask:ff6b9f64:23:01: PSN: 0x02e81ab2
CSMgrTask:ff6b9f8c:23:01: MDT: 2013/05
CSMgrTask:ff6b9fa4:23:01: CRC: 0x9b
CSMgrTask:ff6b9fb4:23:01: ***********************************
CSMgrTask:ff6ba038:23:03: sdSendCID: MID = 0x41, PDN = 0x5344
CSMgrTask:ff6ba048:23:01: sdSendCID End
CSMgrTask:ff6b9bf0:23:01: sdSelectDeselectCard Start
CSMgrTask:ff6b9ddc:23:01: sdSelectDeselectCard End
CSMgrTask:ff6b9a78:23:01: sdSetClearCardDetect Start
CSMgrTask:ff6b9bd4:23:01: sdSetClearCardDetect End
CSMgrTask:ff6b9708:23:01: sdSendStatus Start
CSMgrTask:ff6b98bc:23:03: sdSendStatus: SD_CARD_TYPE_H = 0x0000
CSMgrTask:ff6b98d8:23:03: sdSendStatus: SD_CARD_TYPE_L = 0x0000
CSMgrTask:ff6b9958:23:01: sdSendStatus End
CSMgrTask:ff6b95fc:23:01: sdSendSCR Start
CSMgrTask:ff6b9690:23:03: sdSendSCR: SCR=0x03804502, SpecVersion=2
CSMgrTask:ff6b96e8:23:01: sdSendSCR End
CSMgrTask:ff6bd384:23:01: sdCheckFunction Start
CSMgrTask:ff6bd40c:23:01: sdCheckFunction End
CSMgrTask:ff6b8fec:23:01: sdSetFunction( 16776961 ) Start
CSMgrTask:ff6b91c8:23:01: sdSetFunction( 16776961 ) End
CSMgrTask:ff6bae58:23:01: sdIdentifyDrive End(2)
CSMgrTask:ff6bcd20:23:01: pBlkDev=0x647b64
CSMgrTask:ff6bcd40:23:03: nBlocks=121864192, blksPerTrack=0, nHeads=0
CSMgrTask:ff6bcec0:23:03: ERASE_TIMEOUT:2a
CSMgrTask:ff6bcee0:23:03: ERASE_OFFSET:2
CSMgrTask:ff6bcf08:23:03: ERASE_SIZE:100
CSMgrTask:ff6bcf28:23:03: AU_SIZE:f
CSMgrTask:ff6bcf3c:23:03: dwEraseSectorSize:128
CSMgrTask:ff6bcf5c:23:03: dwEraseBlks:80000 CSD:1
CSMgrTask:ff6bdb44:23:05: SD_GetAccessMode=3
CSMgrTask:ff6bdb7c:23:05: Set Hi-Speed Mode( 48MHz )
CSMgrTask:ff6bc87c:23:01: sdReadBlk: st=0, num=1, buf=0x40647d4c
CSMgrTask:ff6bb3f4:23:01: sdDMAReadBlk: st=0, num=1
CSMgrTask:ff5c592c:21:01: fsuGetPart: default 1
CSMgrTask:ff5c5948:21:01: nBlocks = 121864192, blkOffset = 32768
diff -r 3f8197bdca6a src/dm-spy.c
--- a/src/dm-spy.c Thu Jul 31 10:23:06 2014 +0300
+++ b/src/dm-spy.c Thu Jul 31 10:23:37 2014 +0300
@@ -24,7 +24,7 @@
extern void dm_spy_extra_install();
extern void dm_spy_extra_uninstall();
-#define BUF_SIZE (1024*1024)
+#define BUF_SIZE (128*1024)
static char* buf = 0;
static volatile int len = 0;
@@ -86,6 +86,8 @@
/* careful, 1MB may be too much for your camera */
static char staticbuf[BUF_SIZE];
+#include "cache_hacks.h"
+
// call this from boot-hack.c
void debug_intercept()
{
@@ -95,12 +97,9 @@
{
buf = staticbuf;
//~ dm_spy_extra_install(); /* not exactly working, figure out why */
- patch_memory(
- DebugMsg_addr, /* hook on the first instruction in DebugMsg */
- MEM(DebugMsg_addr), /* do not do any checks; on 5D2 it would be e92d000f, not sure if portable */
- B_INSTR(DebugMsg_addr, my_DebugMsg), /* replace all calls to DebugMsg with our own function (no need to call the original) */
- "dm-spy: log all DebugMsg calls"
- );
+ cache_lock();
+ cache_fake(DebugMsg_addr + 0xFF9F07C0, B_INSTR(DebugMsg_addr, &my_DebugMsg), TYPE_DCACHE);
+
}
else // subsequent call, uninstall the hook and save log to file
{
...
if sd_device.off_0x10 /*0x39970*/ != 0:
sd_use_1_8V_signaling()
if ret_sd_use_1_8V_signaling_FF6BAB0C != 0:
RAM:DebugMsg(35, 5, msg='Set 1.8V Signaling')
...
NSTUB(0xff48446c, sd_use_1_8V_signaling):
ff48446c: e3a00000 mov r0, #0
ff484470: e12fff1e bx lr
+ patch_memory(0xff48446c, 0xe3a00000, 0xe3a00001, "SD 1.8V");
+ patch_memory(0x39970, 0, 1, "SD 1.8V");
Set 1.8V Signaling
sdSendVoltageSwitch Start
sdSendVoltageSwitch End
sdAllSendCID Start
sdAllSendCID End
sdSendRelativeAddress Start
sdSendRelativeAddress End
sdSendCSD Start
CsdStructVersion = 1
MMCSpecVersion = 0
C_SIZE=0x0001d0df READ_BL_LEN=0x0009
*** EraseBlks = 128 ***
CARD CAPACITY is 59504Mbyte( 121864192Sec )
sdSendCSD End
sdSendCID Start
***********************************
MID: 0x41
OID: 0x3432
PNM: SD64G
PRV: 3.0
PSN: 0x02e81ab2
MDT: 2013/05
CRC: 0x9b
***********************************
sdSendCID: MID = 0x41, PDN = 0x5344
sdSendCID End
sdSelectDeselectCard Start
sdSelectDeselectCard End
sdSetClearCardDetect Start
sdSetClearCardDetect End
sdSendStatus Start
sdSendStatus: SD_CARD_TYPE_H = 0x0000
sdSendStatus: SD_CARD_TYPE_L = 0x0000
sdSendStatus End
sdSendSCR Start
sdSendSCR: SCR=0x03804502, SpecVersion=2
sdSendSCR End
sdCheckFunction Start
sdCheckFunction End
sdSetFunction( 16711682 ) Start
sdSetFunction( 16711682 ) End
sdIdentifyDrive End(2)
pBlkDev=0x647c44
nBlocks=121864192, blksPerTrack=0, nHeads=0
ERASE_TIMEOUT:2a
ERASE_OFFSET:2
ERASE_SIZE:100
AU_SIZE:f
dwEraseSectorSize:128
dwEraseBlks:80000 CSD:1
SD_GetAccessMode=7
Set Hi-Speed Mode( 96MHz )
sdReadBlk: st=0, num=1, buf=0x40648130
sdDMAReadBlk: st=0, num=1
fsuGetPart: default 1
nBlocks = 121864192, blkOffset = 32768
SD_GetAccessMode=7
Set Hi-Speed Mode( 96MHz )
CSMgrTask:ff329c70:1e:01: CSMgrTask: pMessage=0x1d548, pLStorage=0x7c67f8
CSMgrTask:ff329bb0:1e:01: MapLogToPhysic: pLStorage=0x7c67f8
CSMgrTask:ff329bd4:1e:01: MapLogToPhysic: SUCCESS(ID=1)
CSMgrTask:ff329bb0:1e:01: MapLogToPhysic: pLStorage=0x7c67f8
CSMgrTask:ff329bd4:1e:01: MapLogToPhysic: SUCCESS(ID=1)
CSMgrTask:ff393d60:23:03: ---- SDEventHandler(ID=1:Event=8) ----
CSMgrTask:ff393148:23:01: SD_DeviceCreate: StorageID=1, TotalBlks=0, HiddenBlk=0
CSMgrTask:ff39315c:23:01: WriteProtect=0
CSMgrTask:ff393244:23:01: sdIdentifyDrive Start
CSMgrTask:ff392180:23:01: sdSoftReset( 0 )
CSMgrTask:ff3921e8:23:01: sdSoftReset SUCCESS
CSMgrTask:ff392204:23:01: sdTrySendCommand1 Start
CSMgrTask:ff39223c:23:03: sdTrySendCommand1: Timeout
CSMgrTask:ff392180:23:01: sdSoftReset( 0 )
CSMgrTask:ff3921e8:23:01: sdSoftReset SUCCESS
CSMgrTask:ff391d84:23:01: sdIdentifyDrive Start
CSMgrTask:ff393b68:23:01: sdSendIFCondition Start
CSMgrTask:ff393c34:23:01: sdSendIFCondition End
CSMgrTask:ff391a54:23:01: sdSendOCR Start
CSMgrTask:ff391b68:23:03: sdSendOCR: Hi-Capacity Card
CSMgrTask:ff391b68:23:03: sdSendOCR: Hi-Capacity Card
CSMgrTask:ff391b68:23:03: sdSendOCR: Hi-Capacity Card
CSMgrTask:ff391b68:23:03: sdSendOCR: Hi-Capacity Card
CSMgrTask:ff391b68:23:03: sdSendOCR: Hi-Capacity Card
CSMgrTask:ff391b68:23:03: sdSendOCR: Hi-Capacity Card
CSMgrTask:ff391b68:23:03: sdSendOCR: Hi-Capacity Card
CSMgrTask:ff391d68:23:01: sdSendOCR End
CSMgrTask:ff391de0:23:01: sdAllSendCID Start
CSMgrTask:ff391f40:23:01: sdAllSendCID End
CSMgrTask:ff3918ec:23:01: sdSendRelativeAddress Start
CSMgrTask:ff391a28:23:01: sdSendRelativeAddress End
CSMgrTask:ff3915a8:23:01: sdSendCSD Start
CSMgrTask:ff391650:23:03: CsdStructVersion = 1
CSMgrTask:ff39166c:23:03: MMCSpecVersion = 0
CSMgrTask:ff391730:23:03: C_SIZE=0x000076b2 READ_BL_LEN=0x0009
CSMgrTask:ff391770:23:03: *** EraseBlks = 128 ***
CSMgrTask:ff391794:23:05: CARD CAPACITY is 15193Mbyte( 31116288Sec )
CSMgrTask:ff3917ac:23:01: sdSendCSD End
CSMgrTask:ff39133c:23:01: sdSendCID Start
CSMgrTask:ff3913ec:23:01: **************************************************
CSMgrTask:ff391400:23:01: 0x03534453
CSMgrTask:ff391414:23:01: 0x55313647
CSMgrTask:ff391428:23:01: 0x80160927
CSMgrTask:ff39143c:23:01: 0x9300c22d
CSMgrTask:ff39144c:23:01: **************************************************
CSMgrTask:ff3914d4:23:03: sdSendCID: MID = 0x03, PDN = 0x5355
CSMgrTask:ff3914e4:23:01: sdSendCID End
CSMgrTask:ff3938e4:23:01: sdSelectDeselectCard Start
CSMgrTask:ff3939b0:23:01: sdSelectDeselectCard End
CSMgrTask:ff3910c4:23:01: sdSetClearCardDetect Start
CSMgrTask:ff391320:23:01: sdSetClearCardDetect End
CSMgrTask:ff390e90:23:01: sdSendStatus Start
CSMgrTask:ff391050:23:01: sdSendStatus: SD_CARD_TYPE = 0x0000
CSMgrTask:ff3910a8:23:01: sdSendStatus End
CSMgrTask:ff390c74:23:01: sdSendSCR Start
CSMgrTask:ff390e48:23:03: sdSendSCR: SCR=0x03803502, SpecVersion=2
CSMgrTask:ff390e70:23:01: sdSendSCR End
CSMgrTask:ff390b6c:23:01: sdSwitchFunction( 0 ) Start
CSMgrTask:ff390c28:23:03: sdSwitchFunction( 0 ) Status=0x80000003, AccessMode=3
CSMgrTask:ff390c54:23:01: sdSwitchFunction( 0 ) End
CSMgrTask:ff391ed0:23:03: Support Hi Speed Mode
CSMgrTask:ff390b6c:23:01: sdSwitchFunction( 1 ) Start
CSMgrTask:ff390c28:23:03: sdSwitchFunction( 1 ) Status=0x80000003, AccessMode=3
CSMgrTask:ff390c54:23:01: sdSwitchFunction( 1 ) End
CSMgrTask:ff39202c:23:01: sdIdentifyDrive End(2)
CSMgrTask:ff39344c:23:01: pBlkDev=0x7c684c
CSMgrTask:ff39346c:23:03: nBlocks=31116288, blksPerTrack=0, nHeads=0
CSMgrTask:ff393e8c:23:05: SD_GetAccessMode=3
CSMgrTask:ff393ea8:23:03: Set Hi-Speed Mode( 48MHz )
CSMgrTask:ff29000c:21:01: [fsuDeviceAdd] (1)
CSMgrTask:ff392e18:23:01: sdReadBlk: st=0, num=1, ofst=0
CSMgrTask:ff3928a0:23:01: sdDMAReadBlk: st=0, num=1
CSMgrTask:ff32fc0c:21:01: fsuGetPart: default 1
CSMgrTask:ff32fc28:21:01: nBlocks = 31116288, blkOffset = 8192
You should also add a call to debug_intercept() somewhere early in the boot process; the 6D uses a different boot method than the one I've tested. I think putting it right before init_task should be OK.
There may be some more quirks (like who knows what is clearing the cache, or you run out of RAM), and to debug these, LED blinking (with busy waiting, not msleep) is pretty much the only tool you have. Take a look in blink.c.
I'll post a decoder for these blinks soon, so you can read the startup messages (encoded as LED blinks) with a second camera.
init:ff149c04:00:01: [SF] SetCSSerialFlash : 0xc022002c 0x46
init:ff146a60:00:01: [PM] DisablePowerSave (Counter = 1)
init:ff0c32b0:8b:16:
K302 ICU Firmware Version 1.1.3 ( 5.7.4 )
init:ff0c32c4:8b:05:
ICU Release DateTime 2013.02.28 18:02:17
init:ff0fc40c:00:03: [SEQ] CreateSequencer (Startup, Num = 6)
init:ff0fc660:00:02: [SEQ] NotifyComplete (Startup, Flag = 0x10000)
init:ff0fc6c4:00:03: [SEQ] NotifyComplete (Cur = 0, 0x10000, Flag = 0x10000)
Startup:ff133ca0:02:16: PROPAD_CreateFROMPropertyHandle DRAMAddr 0x41744000
Startup:ff149b8c:00:01: [SF] IsAddressSerialFlash 0x10000
Startup:ff149b8c:00:01: [SF] IsAddressSerialFlash 0x10000
Startup:ff1472f8:00:01: [SF] CreateSerial : 0x80a00408 0xc0820438 0xc0820404
Startup:ff1471a0:00:01: [SF] readSerialFlash Dest 0x4044f9dc Src 0x10000 Size 512
Startup:ff149c04:00:01: [SF] SetCSSerialFlash : 0xc022002c 0x44
Startup:ff147168:00:01: [SF] SendCommandWithAddress : 0x3 0x1 0x0 0x0
Startup:ff149c04:00:01: [SF] SetCSSerialFlash : 0xc022002c 0x46
Startup:ff130d58:02:16: SerialFlash Packages!! 0x10000
Startup:ff149b8c:00:01: [SF] IsAddressSerialFlash 0x10000
Startup:ff1472f8:00:01: [SF] CreateSerial : 0x80a00408 0xc0820438 0xc0820404
Startup:ff1471a0:00:01: [SF] readSerialFlash Dest 0x4044f9dc Src 0x10000 Size 512
Startup:ff149c04:00:01: [SF] SetCSSerialFlash : 0xc022002c 0x44
Startup:ff147168:00:01: [SF] SendCommandWithAddress : 0x3 0x1 0x0 0x0
Startup:ff149c04:00:01: [SF] SetCSSerialFlash : 0xc022002c 0x46
Startup:ff1472f8:00:01: [SF] CreateSerial : 0x80a00408 0xc0820438 0xc0820404
Startup:ff147c88:00:01: [SF] readSerialFlashWithQuad Dest 0x41744000 Src 0x10000 Size 1813912
Startup:ff149c04:00:01: [SF] SetCSSerialFlash : 0xc022002c 0x44
Startup:ff149cd8:00:01: [SF] SendCommandToSerialFlash : 0x9f
Startup:ff149c04:00:01: [SF] SetCSSerialFlash : 0xc022002c 0x46
Startup:ff147c50:00:03: [SF] readManufactureCodeSerialFlash 0xc2
Startup:ff147cbc:00:03: [SF] MACRONIX
Startup:ff149c04:00:01: [SF] SetCSSerialFlash : 0xc022002c 0x44
Startup:ff149cd8:00:01: [SF] SendCommandToSerialFlash : 0x6
Startup:ff149c04:00:01: [SF] SetCSSerialFlash : 0xc022002c 0x46
Startup:ff149c04:00:01: [SF] SetCSSerialFlash : 0xc022002c 0x44
Startup:ff149cd8:00:01: [SF] SendCommandToSerialFlash : 0x5
Startup:ff149c04:00:01: [SF] SetCSSerialFlash : 0xc022002c 0x46
Startup:ff149c04:00:01: [SF] SetCSSerialFlash : 0xc022002c 0x44
Startup:ff147bc8:00:01: [SF] SendCommandToSerialFlashWithData : 0x1 0x40 0xf0
Startup:ff149c04:00:01: [SF] SetCSSerialFlash : 0xc022002c 0x46
Startup:ff149c04:00:01: [SF] SetCSSerialFlash : 0xc022002c 0x44
Startup:ff149cd8:00:01: [SF] SendCommandToSerialFlash : 0x5
Startup:ff149c04:00:01: [SF] SetCSSerialFlash : 0xc022002c 0x46
Startup:ff149c04:00:01: [SF] SetCSSerialFlash : 0xc022002c 0x44
Startup:ff147168:00:01: [SF] SendCommandWithAddress : 0x6b 0x1 0x0 0x0
Startup:ff0fc320:00:05: [SEQ] seqEventDispatch (Startup, 0)
Startup:ff0c3664:8b:05: startupEntry
Startup:ff149b8c:00:01: [SF] IsAddressSerialFlash 0xf00c0000
Startup:ff149b8c:00:01: [SF] IsAddressSerialFlash 0xf00c0000
Startup:ff149b8c:00:01: [SF] IsAddressSerialFlash 0xf00c0000
Startup:ff149b8c:00:01: [SF] IsAddressSerialFlash 0xf01c0000
Startup:ff149b8c:00:01: [SF] IsAddressSerialFlash 0xf8080000
Startup:ff149b8c:00:01: [SF] IsAddressSerialFlash 0xf8080000
Startup:ff149b8c:00:01: [SF] IsAddressSerialFlash 0xf80ac000
Startup:ff149b8c:00:01: [SF] IsAddressSerialFlash 0xf80ae000
Startup:ff149b8c:00:01: [SF] IsAddressSerialFlash 0xf0060000
Startup:ff149b8c:00:01: [SF] IsAddressSerialFlash 0xf0060000
Startup:ff149b8c:00:01: [SF] IsAddressSerialFlash 0xf0080000
Startup:ff149b8c:00:01: [SF] IsAddressSerialFlash 0xf00a0000
Startup:ff149b8c:00:01: [SF] IsAddressSerialFlash 0xf01e0000
Startup:ff149b8c:00:01: [SF] IsAddressSerialFlash 0xf01e0000
Startup:ff149b8c:00:01: [SF] IsAddressSerialFlash 0xf01e0000
Startup:ff149b8c:00:01: [SF] IsAddressSerialFlash 0xf0200000
Startup:ff149b8c:00:01: [SF] IsAddressSerialFlash 0xf0020000
Startup:ff149b8c:00:01: [SF] IsAddressSerialFlash 0xf0020000
Startup:ff149b8c:00:01: [SF] IsAddressSerialFlash 0xf0020000
Startup:ff149b8c:00:01: [SF] IsAddressSerialFlash 0xf0021000
Startup:ff149c04:00:01: [SF] SetCSSerialFlash : 0xc022002c 0x46
Startup:ff149b8c:00:01: [SF] IsAddressSerialFlash 0x490000
Startup:ff1472f8:00:01: [SF] CreateSerial : 0x80a00408 0xc0820438 0xc0820404
Startup:ff1471a0:00:01: [SF] readSerialFlash Dest 0x4059df3c Src 0x10000 Size 512
Startup:ff149c04:00:01: [SF] SetCSSerialFlash : 0xc022002c 0x44
Startup:ff147168:00:01: [SF] SendCommandWithAddress : 0x3 0x1 0x0 0x0
Startup:ff149c04:00:01: [SF] SetCSSerialFlash : 0xc022002c 0x46
Startup:ff130d58:02:16: SerialFlash Packages!! 0x7
Startup:ff1311d4:02:03: pFromProperty->pNextWriteAddress 0x10000
Startup:ff0c298c:8b:05: startupPropAdminMain : End
Startup:ff0fc660:00:02: [SEQ] NotifyComplete (Startup, Flag = 0x20000000)
Startup:ff0fc830:00:16: [SEQ ERROR] NotifyComplete (Cur = 1, 0x2, Flag = 0x20000000)
Startup:ff2293b4:81:03: Initialize Adjective & Situation
....
....
PropMgr:ff311d2c:01:03: LV_CFilter : kind 0 hv 0
PropMgr:ff311d60:01:03: Level 0 0 0 0 0 0 0 0
PropMgr:ff0cb72c:8a:03: HotPlug WifiSetting = 0
PropMgr:ff3104fc:01:03: Complete WaitID = 0x8000003F, 0x00000000(0)
PropMgr:ff146a60:00:01: [PM] DisablePowerSave (Counter = 2)
PropMgr:ff146ad0:00:01: [PM] EnablePowerSave (Counter = 1)
**INTERRUPT**:ff146a60:00:01: [PM] DisablePowerSave (Counter = 2)
**INTERRUPT**:ff146ad0:00:01: [PM] EnablePowerSave (Counter = 1)
**INTERRUPT**:ff146a60:00:01: [PM] DisablePowerSave (Counter = 2)
**INTERRUPT**:ff146ad0:00:01: [PM] EnablePowerSave (Counter = 1)
PropMgr:ff0f7f28:8d:03: emSlaveChangeCBR : AUTO_POWEROFF (1)
PropMgr:ff0f7f58:8d:03: emSlaveChangeCBR : UILOCK (0x0)
PropMgr:ff3104fc:01:03: Complete WaitID = 0x80000045, 0x00000000(0)
PropMgr:ff146a60:00:01: [PM] DisablePowerSave (Counter = 2)
PropMgr:ff146ad0:00:01: [PM] EnablePowerSave (Counter = 1)
**INTERRUPT**:ff146a60:00:01: [PM] DisablePowerSave (Counter = 2)
**INTERRUPT**:ff146ad0:00:01: [PM] EnablePowerSave (Counter = 1)
Startup:ff0fc320:00:05: [SEQ] seqEventDispatch (Startup, 1)
Startup:ff0c43b8:8b:05: startupPrepareProperty
**INTERRUPT**:ff146a60:00:01: [PM] DisablePowerSave (Counter = 2)
**INTERRUPT**:ff146ad0:00:01: [PM] EnablePowerSave (Counter = 1)
PropMgr:ff0c4378:8b:03: PROP_GPS_AUTO_TIME_SETTING 0
PropMgr:ff3104fc:01:03: Complete WaitID = 0x8003006F, 0x00000000(0)
PropMgr:ff146a60:00:01: [PM] DisablePowerSave (Counter = 2)
PropMgr:ff146ad0:00:01: [PM] EnablePowerSave (Counter = 1)
**INTERRUPT**:ff146a60:00:01: [PM] DisablePowerSave (Counter = 2)
**INTERRUPT**:ff146ad0:00:01: [PM] EnablePowerSave (Counter = 1)
Startup:ff0fc660:00:02: [SEQ] NotifyComplete (Startup, Flag = 0x20000000)
Startup:ff0fc6c4:00:03: [SEQ] NotifyComplete (Cur = 2, 0x20420110, Flag = 0x20000000)
Startup:ff0c4400:8b:03: startupPrepareCapture : CLASSID_FLAG_PROPAD
**INTERRUPT**:ff146a60:00:01: [PM] DisablePowerSave (Counter = 2)
**INTERRUPT**:ff146ad0:00:01: [PM] EnablePowerSave (Counter = 1)
Startup:ff128384:24:03: FM_Initialize (0, 1, 0)
PropMgr:ff1281cc:24:03: fmResultCBR (0x5a16ac)
PropMgr:ff128210:24:03: PROP_HDD_DCIM_PATH (/)
PropMgr:ff0fce14:81:03: dwNewAeModeDial = 2
PropMgr:ff228b50:81:01: CustomSlaveCBR 0x80000000(0 0 0) 0x2
PropMgr:ff228f14:81:03: ChangeAEMode -> 2 @AE_MODE_DIAL
PropMgr:ff228834:81:03: !! Convert End !!
PropMgr:ff228b50:81:01: CustomSlaveCBR 0x80000044(0 0 0) 0x0
PropMgr:ff228b50:81:01: CustomSlaveCBR 0x80000001(0 0 0) 0x2
PropMgr:ff30d23c:01:03: Deliv WaitID = 0x80000001, 0xFF228B1C(1)
PropMgr:ff228b50:81:01: CustomSlaveCBR 0x205000e(0 0 0) 0x1
PropMgr:ff3104fc:01:03: Complete WaitID = 0x80000001, 0xFF228B1C(0)
PropMgr:ff310570:01:03: SpecialComplete ID = 0x80000001, 0x80000001 2478
PropMgr:ff146a60:00:01: [PM] DisablePowerSave (Counter = 2)
PropMgr:ff146ad0:00:01: [PM] EnablePowerSave (Counter = 1)
**INTERRUPT**:ff146a60:00:01: [PM] DisablePowerSave (Counter = 2)
**INTERRUPT**:ff146ad0:00:01: [PM] EnablePowerSave (Counter = 1)
Startup:ff12260c:27:03: FC_Initialize [drive:3][ClassID:39]
Startup:ff141348:00:03: [RTC] PROPAD_GetPropertyData : PROP_TIME_ZONE 19
Startup:ff1414f4:00:03: [RTC] PROPAD_GetPropertyData : PROP_SUMMERTIME_SETTING 0
PropMgr:ff146a60:00:01: [PM] DisablePowerSave (Counter = 2)
PropMgr:ff146ad0:00:01: [PM] EnablePowerSave (Counter = 1)
**INTERRUPT**:ff146a60:00:01: [PM] DisablePowerSave (Counter = 2)
**INTERRUPT**:ff146ad0:00:01: [PM] EnablePowerSave (Counter = 1)
PropMgr:ff14108c:00:07: [RTC] ChangePropertyCBR 0x0, 0x6000
Startup:ff14d6d8:00:03: [SND] Seq LPC 5-0
Startup:ff14d708:00:03: [SND] HARB_ARBMODE Before:0x00000001 Current:0x00000000
Startup:ff14d740:00:03: [SND] HARB_HARBCTRL Before:0x2AAAAAE8 Current:0x2AAAAAE8
Startup:ff14d750:00:03: [SND] Seq LPC 5-1
Startup:ff14d778:00:03: [SND] Seq LPC 5-2
Startup:ff14d79c:00:03: [SND] Seq LPC 5-3
Startup:ff14d7d4:00:03: [SND] Seq LPC 5-4
Startup:ff14d7e4:00:03: [SND] Seq LPC 5-5
Startup:ff14d80c:00:03: [SND] Seq LPC 5-6
Startup:ff14d820:00:03: [SND] Seq LPC 5-7
Startup:ff0c44dc:00:16: [SND] Seq LPC fin
Startup:ff0ef8ec:80:16: hMemoryQueue (0x800010) hStorageQueue (0x820012)
PropMgr:ff146a60:00:01: [PM] DisablePowerSave (Counter = 2)
PropMgr:ff146ad0:00:01: [PM] EnablePowerSave (Counter = 1)
**INTERRUPT**:ff146a60:00:01: [PM] DisablePowerSave (Counter = 2)
**INTERRUPT**:ff146ad0:00:01: [PM] EnablePowerSave (Counter = 1)
PropMgr:ff146a60:00:01: [PM] DisablePowerSave (Counter = 2)
PropMgr:ff146ad0:00:01: [PM] EnablePowerSave (Counter = 1)
**INTERRUPT**:ff146a60:00:01: [PM] DisablePowerSave (Counter = 2)
**INTERRUPT**:ff146ad0:00:01: [PM] EnablePowerSave (Counter = 1)
PropMgr:ff0ef054:80:16: MemoryStatusMasterResultCBR
PropMgr:ff146a60:00:01: [PM] DisablePowerSave (Counter = 2)
PropMgr:ff146ad0:00:01: [PM] EnablePowerSave (Counter = 1)
**INTERRUPT**:ff146a60:00:01: [PM] DisablePowerSave (Counter = 2)
**INTERRUPT**:ff146ad0:00:01: [PM] EnablePowerSave (Counter = 1)
Startup:ff1fb614:80:16: ### LIST 8 0 8 ###
Startup:ff1fb744:80:03: AllocateMemoryUnit For ExMem1
Startup:ff1fb744:80:03: AllocateMemoryUnit For ExMem1
Startup:ff1fb744:80:03: AllocateMemoryUnit For ExMem1
Startup:ff1fb744:80:03: AllocateMemoryUnit For ExMem1
Startup:ff1fb950:80:03: AllocateMemoryUnit For OnlyMem1
Startup:ff1fb950:80:03: AllocateMemoryUnit For OnlyMem1
Startup:ff1fb950:80:03: AllocateMemoryUnit For OnlyMem1
Startup:ff1fb950:80:03: AllocateMemoryUnit For OnlyMem1
Startup:ff1fc1f8:80:03: #Add [ FreeUnit 4 AddNum 0 ]
Startup:ff1fc244:80:03: #Add1[ 0-> Unit 006c2e60 Address 52400000 SubUnit 15]
Startup:ff1fc330:80:03: #AddB[ 0-> Unit 006c2e60 Address 52400000 ]
Startup:ff1fc244:80:03: #Add1[ 1-> Unit 006c2e44 Address 50000000 SubUnit 15]
Startup:ff1fc330:80:03: #AddB[ 1-> Unit 006c2e44 Address 50000000 ]
Startup:ff1fc244:80:03: #Add1[ 2-> Unit 006c2e28 Address 4d400000 SubUnit 15]
Startup:ff1fc330:80:03: #AddB[ 2-> Unit 006c2e28 Address 4d400000 ]
Startup:ff1fc244:80:03: #Add1[ 3-> Unit 006c2e0c Address 4b000000 SubUnit 15]
Startup:ff1fc330:80:03: #AddB[ 3-> Unit 006c2e0c Address 4b000000 ]
Startup:ff206b70:80:03: #Add2[ FreeUnit 4 ]
Startup:ff206c1c:80:03: MemMgr(IMAGE) 0 1
Startup:ff206c1c:80:03: MemMgr(IMAGE) 0 0
Startup:ff206c1c:80:03: MemMgr(IMAGE) 0 6
Startup:ff206c1c:80:03: MemMgr(IMAGE) 0 0
Startup:ff1fa384:80:03: ---- MODE[0 0 0]
Startup:ff201f30:80:03: RearrangeMemMgr 0 3
Startup:ff201fec:80:03: PROP_MEMORY_STATUS(SELF) (10->)13 (OTHER) 13
Startup:ff202020:80:03: Deliver PROP_MEMORY_STATUS 13
Startup:ff1fd844:80:01: ###### AllocateMemoryFromShootMemoryObject 1
Startup:ff1fd920:80:01: ###### 0 0x6C2FA0 0x6C2FA0
Startup:ff1fd920:80:01: ###### 1 0x6C2FA8 0x6C2D80
Startup:ff1fd948:80:01: ###### 1 pMemoryUnit 0x6C2D80 0xDBF50
Startup:ff1fd9b4:80:01: AllocatableSizeOfPackHeap 4194192, 16384, 16384
Startup:ff1fdc5c:80:01: !!AllocateMemory 16384
Startup:ff1fda94:80:01: AllocateMemoryFromShootMemoryObject 1 4194192 16384 0x000dbfa0
Startup:ff1fdab0:80:01: ###### VirtualXXXFreeSize1 4194192 0
Startup:ff1fde70:80:01: ###### VirtualXXXFreeSize2 4177796 0
Startup:ff1fde84:80:01: ###### !! AllocateMemoryFromShootMemoryObject hMemSuite 0xDBFA0
Startup:ff201b74:80:01: OK AllocDev[0] DBFA0 4000 50 1 3FBF84 3FBF84 3FFF90
Startup:ff1f5f9c:80:03: ClearBusy(0x1) 0x40->0x40,0x0(0x40)[0,0]
Startup:ff2019d8:80:03: ### SRMExMem1_1State Event 0 Result State 0->6 ###
RscMgr:ff0ef380:80:02: srmEventDispatch: Current = 0, dwEventID = 15, dwParam = 4 S
RscMgr:ff0ef588:80:02: srmEventDispatch: Current = 0, dwEventID = 15, dwParam = 4 E
RscMgr:ff0ef380:80:02: srmEventDispatch: Current = 0, dwEventID = 15, dwParam = 4 S
RscMgr:ff0ef588:80:02: srmEventDispatch: Current = 0, dwEventID = 15, dwParam = 4 E
RscMgr:ff0ef380:80:02: srmEventDispatch: Current = 0, dwEventID = 15, dwParam = 4 S
RscMgr:ff2019d8:80:03: ### SRMExMem1_1State Event 4 Result State 6->6 ###
RscMgr:ff1fe40c:80:01: ###### VirtualFreeMemoryToShootMemoryObject 0xDBFA0
RscMgr:ff1fe0dc:80:01: VirtualAllocFreeMemory 0xDBFA0 0x6C2FA0 0x6C2F68
RscMgr:ff1fe16c:80:01: ###### ChunkSize 16396
RscMgr:ff1fe198:80:01: ###### VIRTUAL_FREE pMemoryUnit->VirtualFreeSize[0] 4194192
RscMgr:ff1fe1c4:80:01: ###### +pMemoryObject->Virtual1stFreeSize 4194192
RscMgr:ff1fe378:80:01: ###### +pMemoryObject->Virtual2ndFreeSize 0
RscMgr:ff1fd7b8:80:01: FreeMemoryToShootMemoryObject 4194192 16384 0xDBFA0
RscMgr:ff1fd7cc:80:01: ###### FreeMemoryToShootMemoryObject 0xDBFA0
RscMgr:ff201dac:80:01: FMem3 DBFA0 4000 9AD6A00 9AD6A00 9AD6A00 3FFF90 3FFF90 3FFF90
RscMgr:ff1fa384:80:03: ---- MODE[0 0 0]
RscMgr:ff1fd844:80:01: ###### AllocateMemoryFromShootMemoryObject 1
RscMgr:ff1fd920:80:01: ###### 0 0x6C2FA0 0x6C2FA0
RscMgr:ff1fd920:80:01: ###### 1 0x6C2FA8 0x6C2D80
RscMgr:ff1fd948:80:01: ###### 1 pMemoryUnit 0x6C2D80 0xDBF50
RscMgr:ff1fd9b4:80:01: AllocatableSizeOfPackHeap 4194192, 16384, 16384
RscMgr:ff1fdc5c:80:01: !!AllocateMemory 16384
RscMgr:ff1fda94:80:01: AllocateMemoryFromShootMemoryObject 1 4194192 16384 0x000dbfa0
RscMgr:ff1fdab0:80:01: ###### VirtualXXXFreeSize1 4194192 0
RscMgr:ff1fde70:80:01: ###### VirtualXXXFreeSize2 4177796 0
RscMgr:ff1fde84:80:01: ###### !! AllocateMemoryFromShootMemoryObject hMemSuite 0xDBFA0
....
.....
....
.....
....[SD] ---- SDEventHandler(ID=1:Event=8) ----
751: 479.188 [SD] sdTrySendCommand1: Timeout
752: 581.824 [SD] sdSendOCR: CCS=1, S18A=1
753: 581.940 [SD] Set 1.8V Signaling
754: 616.888 [SD] CsdStructVersion = 1
755: 616.912 [SD] MMCSpecVersion = 0
756: 616.941 [SD] C_SIZE=0x000077bf READ_BL_LEN=0x0009
757: 616.960 [SD] *** EraseBlks = 128 ***
758: 616.988 [SD] CARD CAPACITY is 15328Mbyte( 31391744Sec )
759: 618.293 [SD] sdSendCID: MID = 0x01, PDN = 0x5355
760: 625.440 [SD] sdSendStatus: SD_CARD_TYPE_H = 0x0000
761: 625.457 [SD] sdSendStatus: SD_CARD_TYPE_L = 0x0000
762: 628.260 [SD] sdSendSCR: SCR=0x03803502, SpecVersion=2
763: 629.946 [SD] nBlocks=31391744, blksPerTrack=0, nHeads=0
764: 629.968 [SD] ERASE_TIMEOUT:1
765: 629.979 [SD] ERASE_OFFSET:3
766: 629.992 [SD] ERASE_SIZE:8
767: 630.001 [SD] AU_SIZE:9
768: 630.013 [SD] dwEraseSectorSize:128
769: 630.028 [SD] dwEraseBlks:2000 CSD:1
770: 630.054 [SD] SD_GetAccessMode=7
771: 630.066 [SD] Set Hi-Speed Mode( 96MHz )
772: 631.102 [FSU] fsuGetPart: Block(8192, 31383552, 31391744)
773: 634.495 [FM] EV_INSERTION_COMPLETE : ID = 2, stat = 8192
774: 634.561 [FM] fmLateMountCard
775: 634.584 [FM] fmPrepareShooting (Drive = 2)
But I doubt they would, why would Canon not make use of the speed :-\No clue myself just guessing why they could slow it down:
I can imagine that Canon slows down the max speed of 50Mbit to 40Mbit for better lifetime or more stable performance.
But why would you slow down to 40Mbit if the controller supports 100Mbit...
...
....for example, only log those messages from CSMgrTask.
#define MMC_CAP_UHS_SDR12 (1 << 15) /* Host supports UHS SDR12 mode */
#define MMC_CAP_UHS_SDR25 (1 << 16) /* Host supports UHS SDR25 mode */
#define MMC_CAP_UHS_SDR50 (1 << 17) /* Host supports UHS SDR50 mode */
#define MMC_CAP_UHS_SDR104 (1 << 18) /* Host supports UHS SDR104 mode */
#define MMC_CAP_UHS_DDR50 (1 << 19) /* Host supports UHS DDR50 mode */
#ifdef CONFIG_6D
{ 0xyzblabla, "StateTransition", 4 , state_transition_log },
{ 0xFF78D814, "SDCheckStatus", WhatToPutHere??? }
#endifCSMgrTask:ff6bdb7c:23:05: Set Hi-Speed Mode( 48MHz ) ; real hardware
[ CSMgrTask:ff6bdb9c ] (23:05) Set Normal-Speed Mode( 24MHz ) ; QEMU 2.5.0
CSMgrTask:ff6bdb44:23:05: SD_GetAccessMode=3
CSMgrTask:ff6bdb7c:23:05: Set Hi-Speed Mode( 48MHz )
CSMgrTask:ff6b8fec:23:01: sdSetFunction( 16776961 ) Start
CSMgrTask:000aea50:00:00: *** sd_setup_mode(0x2), from ff484738
sd: CMD16 0x00000040 state 4
sd: Response: 00 00 09 00 state 4
CSMgrTask:000aea50:00:00: *** sd_setup_mode(0x2), from ff6b8300
sd: CMD6 0x80ffff01 state 4
sd: Function default selected (fn grp 2)
sd: Function high-speed/SDR25 selected (fn grp 1)
sd: Response: 00 00 09 00 state 5
sd: CMD13 0x45670000 state 4
sd: Response: 00 00 09 00 state 4
sd: CMD16 0x00000200 state 4
sd: Response: 00 00 09 00 state 4
CSMgrTask:ff6b91c8:23:01: sdSetFunction( 16776961 ) End
CSMgrTask:ff6bdb7c:23:05: Set Hi-Speed Mode( 48MHz )
CSMgrTask:000aeed0:00:00: *** sd_set_mode(0x1, 0x3), from ff6bdb88
(some registers)
CSMgrTask:000aeed0:00:00: *** sd_setup_mode(0x3), from ff484738
(some more registers)
CSMgrTask:ff6bc87c:23:01: sdReadBlk: st=0, num=1, buf=0x40983808
CSMgrTask:ff6bdb5c:23:05: Set Hi-Speed Mode( 96MHz )
CSMgrTask:000aeef0:00:00: *** sd_set_mode(0x1, 0x4), from ff6bdb88
(some registers)
CSMgrTask:000aeef0:00:00: *** sd_setup_mode(0x4), from ff484738
(a few more registers, but many of them missing!)
CSMgrTask:ff6bc87c:23:01: sdReadBlk: st=0, num=1, buf=0x409837bc
/* in dm-spy.c, right before dm_spy_extra_install() */
patch_instruction(0xff48446c, 0xe3a00000, 0xe3a00001, "SD 1.8V");
/* in dm-spy-extra.c */
static void sd_setup_mode_log(uint32_t* regs, uint32_t* stack, uint32_t pc)
{
/* log the original call as usual */
generic_log(regs, stack, pc);
if (regs[0] == 4)
{
MEM(0xC0400600) = 3;
MEM(0xC0400610) = 4;
MEM(0xC0400614) = 0x1D000301;
MEM(0xC0400618) = 0;
MEM(0xC0400624) = 0x201;
MEM(0xC0400628) = 0x201;
MEM(0xC040061C) = 0x100;
MEM(0xC0400620) = 4;
MEM(0xC0400604) = 3;
}
}
/* under CONFIG_5D3_123 */
{ 0xFF4844A0, "sd_setup_mode", 1, sd_setup_mode_log },
My hypothesis was that 5D3's SD controller is UHS-capable, but for some unknown reason (could be even problems during the initial tests), Canon decided not to include it in the firmware. As a result, some of the UHS initialization code (hopefully a small part) was optimized out.
Can the clock speed be pushed even further?
module_hginfo_dump.sh sd_uhs.mo
static uint32_t regs[] = { 0xC0400600, 0xC0400604,/*C0400608, C040060C*/0xC0400610, 0xC0400614, 0xC0400618, 0xC0400624, 0xC0400628, 0xC040061C, 0xC0400620 }; /* register addresses */
static uint32_t sd50[] = { 0x3, 0x3, 0x4, 0x1D000301, 0x0, 0x201, 0x201, 0x100, 0x4 }; /* SDR50 values from 700D */
static uint32_t unck[] = { 0x3, 0x3, 0x5, 0x1D000401, 0x0, 0x201, 0x201, 0x100, 0x5 }; /* underclocked values */
static uint32_t ovck[] = { 0x3, 0x3, 0x3, 0x1D000201, 0x0, 0x201, 0x201, 0x100, 0x3 }; /* overclocked values */
static uint32_t twak[] = { 0xF, 0xF, 0xF, 0x00000F00, 0x0, 0xF0F, 0xF0F, 0x0, 0xF }; /* what can be tweaked? */
// mode 0 17F 0x1D004101 0 403F 403F 7F 7F
// mode 1 16MHz 3 3 1 1 1D 0x1D001001 0 0xF0E 0xF0E 1D 1D
// mode 2 24MHz 3 3 1 1 13 0x1D000B01 0 0xA09 0xA09 13 13
// mode 3 48MHz 3 3 1 1 9 0x1D000601 0 0x504 0x504 0x100 9
// mode 4 96MHz SDR50 700D 3 3 1 1 4 0x1D000301 0 0x201 0x201 0x100 4
// mode 5 serial flash? 3 7 0x1D000501 0 0x403 0x403 0x403 7
// mode 6 7 13 0x1D000B01 0 0xA09 0xA09 13 13
static void sd_set_function_log(uint32_t* regs, uint32_t* stack, uint32_t pc)
{
/* log the original call as usual */
generic_log(regs, stack, pc);
/* force UHS-I SDR104 */
regs[0] = 0xff0003;
}
{ 0xFF6ADE34, "sdSetFunction", 1, sd_set_function_log },
static void sd_set_function_log(uint32_t* arm_regs, uint32_t* stack, uint32_t pc)
{
/* UHS-I SDR50? */
if (arm_regs[0] == 0xff0002)
{
/* force UHS-I SDR104 */
arm_regs[0] = 0xff0003;
}
}
sudo dd if=/dev/mmcblk0 of=/dev/null bs=1M count=1024
1024+0 records in
1024+0 records out
1073741824 bytes (1.1 GB, 1.0 GiB) copied, 14.5176 s, 74.0 MB/s
Yay tricky one.
Ant123 states to switch power off if already in UHS mode (https://www.magiclantern.fm/forum/index.php?topic=12862.msg185992#msg185992). Maybe he can comment on it.
static uint32_t uhs_regs[] = { 0xC0400600, 0xC0400604,/*C0400608, C040060C*/0xC0400610, 0xC0400614, 0xC0400618, 0xC0400624, 0xC0400628, 0xC040061C, 0xC0400620 }; /* register addresses */
static uint32_t sdr50_700D[] = { 0x3, 0x3, 0x4, 0x1D000301, 0x0, 0x201, 0x201, 0x100, 0x4 }; /* SDR50 values from 700D (96MHz) */
static uint32_t sdr_80MHz[] = { 0x3, 0x3, 0x5, 0x1D000401, 0x0, 0x201, 0x201, 0x100, 0x5 }; /* underclocked values: 80MHz = 96*(4+1)/(5+1) */
static uint32_t sdr_120MHz[] = { 0x3, 0x3, 0x3, 0x1D000201, 0x0, 0x201, 0x201, 0x100, 0x3 }; /* overclocked values: 120MHz = 96*(4+1)/(3+1) */
static uint32_t sdr_132MHz[] = { 0x2, 0x2, 0x2, 0x1D000201, 0x0, 0x100, 0x100, 0x100, 0x2 }; /* overclocked values: 132MHz?! (found by brute-forcing) */
static uint32_t sdr_160MHz[] = { 0x2, 0x3, 0x1, 0x1D000001, 0x0, 0x100, 0x100, 0x100, 0x1 }; /* overclocked values: 160MHz = 96*(4+1)/(2?+1) (found by brute-forcing) */
Source: module_hginfo_dump.sh sd_uhs.moWanted to take a look at the source code, but can't find it ?
BTW, how fast is this card in the card reader? The last test might indicate the need for sampling point tuning.
Wanted to take a look at the source code, but can't find it ?
Run that command in the terminal.
if (is_camera("EOSM", "2.0.2"))
{
sd_setup_mode = 0xFF338D40;
sd_setup_mode_in = 0xFF338DC8;
sd_setup_mode_reg = 1;
sd_set_function = 0xFF63EF60;
SD_ReConfiguration = (void *) 0xFF641314;
}
BTW, how fast is this card in the card reader? The last test might indicate the need for sampling point tuning.Googling about sampling point tuning.
Levas if the card is labelled 45Mb/s you alread reached max performance. You will need to get a faster one for e.g. Sandisk Extreme Pro
From 0xC0400610/20, the frequencies are 80, 96, 120, 160 and 240 - the latter is probably too high.
Any chance that this will work on SL1?
if (is_camera("100D", "1.0.1"))
{
sd_setup_mode = 0xFF3355B0;
sd_setup_mode_in = 0xFF335648;
sd_setup_mode_reg = 1;
sd_set_function = 0xFF6530A4;
SD_ReConfiguration = (void *) 0xFF655458;
}
if (is_camera("650D", "1.0.4"))
{
sd_setup_mode = 0xFF334C4C;
sd_setup_mode_in = 0xFF334CD4;
sd_setup_mode_reg = 1;
sd_set_function = 0xFF73FD20;
SD_ReConfiguration = (void *) 0xFF7420D4;
}
if (is_camera("70D", "1.1.2"))
{
sd_setup_mode = 0xFF33E078;
sd_setup_mode_in = 0xFF33E100;
sd_setup_mode_reg = 1;
sd_set_function = 0xFF7CE4B8;
SD_ReConfiguration = (void *) 0xFF7D086C;
}
700D@Tony Weller
2520x1072
2:35
12 bit lossless
Continuous recording !!! @58MB/s
Does this apply to DIGIC 4 cameras?
I'm afraid not - the hardware configuration of these cameras is different (and a lot simpler). You now know where to look, so you can play with it, attempt to change the clock speed and report your findings.
===================
2018/04/04 17:29:44
===================
Before the hack: r:43MB/s w:42MB/s W:40MB/s R:43MB/s :) [best 42MB/s]
SDR50 @ 96MHz : r:43MB/s w:40MB/s W:42MB/s R:43MB/s meh [best 42MB/s]
SDR50 @ 96MHz : r:43MB/s w:42MB/s W:41MB/s R:43MB/s meh [best 42MB/s]
SDR50 @ 80MHz : r:36MB/s w:35MB/s W:35MB/s R:36MB/s meh [best 42MB/s]
SDR50 @ 80MHz : r:36MB/s w:35MB/s W:35MB/s R:36MB/s meh [best 42MB/s]
SDR50 @ 120MHz : r:54MB/s w:52MB/s W:50MB/s R:54MB/s :) [best 52MB/s]
SDR50 @ 120MHz : r:54MB/s w:51MB/s W:51MB/s R:54MB/s meh [best 52MB/s]
SDR104 @ 96MHz : r:43MB/s w:39MB/s W:41MB/s R:43MB/s meh [best 52MB/s]
SDR104 @ 96MHz : r:43MB/s w:42MB/s W:42MB/s R:43MB/s meh [best 52MB/s]
SDR104 @ 80MHz : r:36MB/s w:35MB/s W:35MB/s R:36MB/s meh [best 52MB/s]
SDR104 @ 80MHz : r:36MB/s w:35MB/s W:35MB/s R:36MB/s meh [best 52MB/s]
SDR104 @ 120MHz: r:54MB/s w:52MB/s W:51MB/s R:54MB/s :) [best 52MB/s]
SDR104 @ 120MHz: r:54MB/s w:50MB/s W:51MB/s R:54MB/s meh [best 52MB/s]
SDR104 @ 132MHz: r:50MB/s w:48MB/s W:48MB/s R:50MB/s meh [best 52MB/s]
SDR104 @ 132MHz: r:50MB/s w:48MB/s W:47MB/s R:50MB/s meh [best 52MB/s]
SDR104 @ 160MHz: r:71MB/s w:64MB/s W:68MB/s R:71MB/s :) [best 64MB/s]
SDR104 @ 160MHz: r:71MB/s w:69MB/s W:65MB/s R:71MB/s :) [best 69MB/s]
Done.
Please run THOROUGH tests before using!!!===================
2018/04/04 20:30:52
===================
Before the hack: r:43MB/s w:42MB/s W:39MB/s R:43MB/s :) [best 42MB/s]
SDR50 @ 96MHz : r:43MB/s w:41MB/s W:41MB/s R:43MB/s meh [best 42MB/s]
SDR50 @ 96MHz : r:43MB/s w:40MB/s W:42MB/s R:43MB/s meh [best 42MB/s]
SDR50 @ 80MHz : r:36MB/s w:35MB/s W:35MB/s R:36MB/s meh [best 42MB/s]
SDR50 @ 80MHz : r:36MB/s w:35MB/s W:35MB/s R:36MB/s meh [best 42MB/s]
SDR50 @ 120MHz : r:54MB/s w:51MB/s W:50MB/s R:54MB/s :) [best 51MB/s]
SDR50 @ 120MHz : r:54MB/s w:52MB/s W:52MB/s R:54MB/s :) [best 52MB/s]
SDR104 @ 96MHz : r:43MB/s w:40MB/s W:41MB/s R:43MB/s meh [best 52MB/s]
SDR104 @ 96MHz : r:43MB/s w:41MB/s W:42MB/s R:43MB/s meh [best 52MB/s]
SDR104 @ 80MHz : r:36MB/s w:35MB/s W:35MB/s R:36MB/s meh [best 52MB/s]
SDR104 @ 80MHz : r:36MB/s w:35MB/s W:35MB/s R:36MB/s meh [best 52MB/s]
SDR104 @ 120MHz: r:54MB/s w:51MB/s W:52MB/s R:54MB/s meh [best 52MB/s]
SDR104 @ 120MHz: r:54MB/s w:52MB/s W:50MB/s R:54MB/s meh [best 52MB/s]
SDR104 @ 132MHz: r:50MB/s w:46MB/s W:48MB/s R:50MB/s meh [best 52MB/s]
SDR104 @ 132MHz: r:50MB/s w:48MB/s W:46MB/s R:50MB/s meh [best 52MB/s]
SDR104 @ 160MHz: r:71MB/s w:66MB/s W:67MB/s R:71MB/s :) [best 66MB/s]
SDR104 @ 160MHz: r:71MB/s w:66MB/s W:66MB/s R:72MB/s meh [best 66MB/s]
Done.
Please run THOROUGH tests before using!!!
Hum--it should work. Make sure sd_uhs is the only active module. The 70D isn't working with lossless compresssion yet and mlv_lite defaults to 14-bit lossless.
@andy kh
You must run a custom build from crop_rec_4k branch, you will find it in dfort's download page https://bitbucket.org/daniel_fort/magic-lantern/downloads/
@dfort have you got some special edition cards? :) Better stickers or something?
Ran a brute force (random) search for the above registers, and...
===================
2018/04/05 00:31:02
===================
Before the hack: r:43MB/s w:42MB/s W:35MB/s R:43MB/s 8) [best 42MB/s]
SDR50 @ 96MHz : r:43MB/s w:39MB/s W:40MB/s R:43MB/s ::) [best 42MB/s]
SDR50 @ 96MHz : r:43MB/s w:41MB/s W:42MB/s R:43MB/s ::) [best 42MB/s]
SDR50 @ 80MHz : r:36MB/s w:33MB/s W:35MB/s R:36MB/s meh [best 42MB/s]
SDR50 @ 80MHz : r:36MB/s w:35MB/s W:35MB/s R:36MB/s meh [best 42MB/s]
SDR50 @ 120MHz : r:54MB/s w:48MB/s W:51MB/s R:54MB/s 8) [best 48MB/s]
SDR50 @ 120MHz : r:54MB/s w:48MB/s W:50MB/s R:54MB/s ::) [best 48MB/s]
SDR104 @ 96MHz : D0 D0 r:43MB/s w:41MB/s W:42MB/s R:43MB/s meh [best 48MB/s]
SDR104 @ 96MHz : D1 D1 r:43MB/s w:39MB/s W:41MB/s R:43MB/s meh [best 48MB/s]
SDR104 @ 80MHz : D0 D0 r:36MB/s w:35MB/s W:35MB/s R:36MB/s meh [best 48MB/s]
SDR104 @ 80MHz : D1 D1 r:36MB/s w:35MB/s W:34MB/s R:36MB/s meh [best 48MB/s]
SDR104 @ 120MHz: D0 D0 r:54MB/s w:47MB/s W:52MB/s R:54MB/s ::) [best 48MB/s]
SDR104 @ 120MHz: D1 D1 r:54MB/s w:51MB/s W:51MB/s R:54MB/s :) [best 51MB/s]
SDR104 @ 132MHz: D0 D0 r:50MB/s w:45MB/s W:47MB/s R:50MB/s meh [best 51MB/s]
SDR104 @ 132MHz: D1 D1 r:50MB/s w:47MB/s W:48MB/s R:50MB/s ::) [best 51MB/s]
SDR104 @ 160MHz: D0 D0 r:72MB/s w:66MB/s W:62MB/s R:71MB/s 8) [best 66MB/s]
SDR104 @ 160MHz: D1 D1 r:71MB/s w:60MB/s W:67MB/s R:71MB/s meh [best 66MB/s]
SDR104 @ 160MHz: D2 D2 r:71MB/s w:67MB/s W:67MB/s R:71MB/s :) [best 67MB/s]
SDR104 @ 160MHz: D3 D3 r:71MB/s w:62MB/s W:68MB/s R:71MB/s ::) [best 67MB/s]
SDR104 @ 160MHz: D0 D0 r:71MB/s w:65MB/s W:63MB/s R:71MB/s ::) [best 67MB/s]
SDR104 @ 160MHz: D1 D1 r:72MB/s w:61MB/s W:68MB/s R:71MB/s ::) [best 67MB/s]
SDR104 @ 160MHz: D2 D2 r:71MB/s w:66MB/s W:61MB/s R:71MB/s ::) [best 67MB/s]
SDR104 @ 160MHz: D3 D3 r:71MB/s w:66MB/s W:67MB/s R:71MB/s ::) [best 67MB/s]
SDR104 @ 160MHz: D0 D0 r:71MB/s w:62MB/s W:65MB/s R:71MB/s ::) [best 67MB/s]
SDR104 @ 160MHz: D1 D1 r:71MB/s w:67MB/s W:67MB/s R:71MB/s :) [best 67MB/s]
SDR104 @ 160MHz: D2 D2 r:71MB/s w:66MB/s W:68MB/s R:71MB/s ::) [best 67MB/s]
SDR104 @ 160MHz: D3 D3 r:71MB/s w:61MB/s W:65MB/s R:71MB/s ::) [best 67MB/s]
SDR104 @ 160MHz: D0 D0 r:72MB/s w:61MB/s W:67MB/s R:71MB/s ::) [best 67MB/s]
SDR104 @ 160MHz: D1 D1 r:72MB/s w:62MB/s W:65MB/s R:71MB/s ::) [best 67MB/s]
SDR104 @ 160MHz: D2 D2 r:71MB/s w:66MB/s W:66MB/s R:71MB/s ::) [best 67MB/s]
SDR104 @ 160MHz: D3 D3 r:71MB/s w:66MB/s W:61MB/s R:72MB/s ::) [best 67MB/s]
Best: D1 D1 r:71MB/s w:62MB/s W:68MB/s R:72MB/s ::) [best 67MB/s]
Best: D1 D1 r:71MB/s w:61MB/s W:67MB/s R:72MB/s ::) [best 67MB/s]
Done.
Please run THOROUGH tests before using!!!
===================
2018/04/04 23:12:54
===================
Before the hack: r:43MB/s w:42MB/s W:37MB/s R:43MB/s 8) [best 42MB/s]
SDR50 @ 96MHz : r:43MB/s w:42MB/s W:39MB/s R:43MB/s ::) [best 42MB/s]
SDR50 @ 96MHz : r:43MB/s w:41MB/s W:42MB/s R:43MB/s ::) [best 42MB/s]
SDR50 @ 80MHz : r:36MB/s w:35MB/s W:35MB/s R:36MB/s meh [best 42MB/s]
SDR50 @ 80MHz : r:36MB/s w:33MB/s W:34MB/s R:36MB/s meh [best 42MB/s]
SDR50 @ 120MHz : r:54MB/s w:51MB/s W:51MB/s R:54MB/s 8) [best 51MB/s]
SDR50 @ 120MHz : r:54MB/s w:48MB/s W:49MB/s R:54MB/s ::) [best 51MB/s]
SDR104 @ 96MHz : D0 D0 r:43MB/s w:41MB/s W:42MB/s R:43MB/s meh [best 51MB/s]
SDR104 @ 96MHz : D1 D1 r:43MB/s w:41MB/s W:42MB/s R:43MB/s meh [best 51MB/s]
SDR104 @ 80MHz : D0 D0 r:36MB/s w:33MB/s W:34MB/s R:36MB/s meh [best 51MB/s]
SDR104 @ 80MHz : D1 D1 r:36MB/s w:35MB/s W:35MB/s R:36MB/s meh [best 51MB/s]
SDR104 @ 120MHz: D0 D0 r:54MB/s w:51MB/s W:48MB/s R:54MB/s ::) [best 51MB/s]
SDR104 @ 120MHz: D1 D1 r:54MB/s w:47MB/s W:51MB/s R:54MB/s ::) [best 51MB/s]
SDR104 @ 132MHz: D0 D0 r:50MB/s w:47MB/s W:48MB/s R:50MB/s ::) [best 51MB/s]
SDR104 @ 132MHz: D1 D1 r:50MB/s w:45MB/s W:46MB/s R:50MB/s meh [best 51MB/s]
SDR104 @ 160MHz: D0 D0 r:72MB/s w:66MB/s W:68MB/s R:72MB/s 8) [best 66MB/s]
SDR104 @ 160MHz: D1 D1 r:72MB/s w:66MB/s W:63MB/s R:72MB/s ::) [best 66MB/s]
SDR104 @ 160MHz: D2 D2 r:72MB/s w:61MB/s W:66MB/s R:70MB/s ::) [best 66MB/s]
SDR104 @ 160MHz: D3 D3 r:71MB/s w:66MB/s W:67MB/s R:71MB/s :) [best 66MB/s]
SDR104 @ 160MHz: D0 D0 r:72MB/s w:61MB/s W:66MB/s R:72MB/s ::) [best 66MB/s]
SDR104 @ 160MHz: D1 D1 r:72MB/s w:62MB/s W:65MB/s R:72MB/s ::) [best 66MB/s]
SDR104 @ 160MHz: D2 D2 r:72MB/s w:61MB/s W:68MB/s R:71MB/s ::) [best 66MB/s]
SDR104 @ 160MHz: D3 D3 r:71MB/s w:66MB/s W:63MB/s R:72MB/s :) [best 66MB/s]
SDR104 @ 160MHz: D0 D0 r:72MB/s w:66MB/s W:67MB/s R:71MB/s ::) [best 66MB/s]
SDR104 @ 160MHz: D1 D1 r:72MB/s w:62MB/s W:65MB/s R:72MB/s ::) [best 66MB/s]
SDR104 @ 160MHz: D2 D2 r:71MB/s w:61MB/s W:67MB/s R:71MB/s ::) [best 66MB/s]
SDR104 @ 160MHz: D3 D3 r:71MB/s w:66MB/s W:68MB/s R:71MB/s ::) [best 66MB/s]
SDR104 @ 160MHz: D0 D0 r:71MB/s w:61MB/s W:64MB/s R:71MB/s ::) [best 66MB/s]
SDR104 @ 160MHz: D1 D1 r:71MB/s w:66MB/s W:68MB/s R:71MB/s ::) [best 66MB/s]
SDR104 @ 160MHz: D2 D2 r:72MB/s w:62MB/s W:65MB/s R:71MB/s ::) [best 66MB/s]
SDR104 @ 160MHz: D3 D3 r:72MB/s w:66MB/s W:63MB/s R:71MB/s ::) [best 66MB/s]
Best: D3 D3 r:72MB/s w:66MB/s W:62MB/s R:71MB/s ::) [best 66MB/s]
Best: D3 D3 r:72MB/s w:61MB/s W:67MB/s R:72MB/s ::) [best 66MB/s]
Done.
Please run THOROUGH tests before using!!!
===================
2018/04/05 02:10:21
===================
Before the hack: r:43MB/s w:41MB/s W:36MB/s R:42MB/s 8) [best 41MB/s]
SDR50 @ 96MHz : r:43MB/s w:41MB/s W:40MB/s R:43MB/s ::) [best 41MB/s]
SDR50 @ 96MHz : r:43MB/s w:41MB/s W:39MB/s R:44MB/s ::) [best 41MB/s]
SDR50 @ 80MHz : r:36MB/s w:35MB/s W:34MB/s R:36MB/s meh [best 41MB/s]
SDR50 @ 80MHz : r:36MB/s w:35MB/s W:34MB/s R:36MB/s meh [best 41MB/s]
SDR50 @ 120MHz : r:53MB/s w:50MB/s W:36MB/s R:54MB/s 8) [best 50MB/s]
SDR50 @ 120MHz : r:53MB/s w:50MB/s W:48MB/s R:54MB/s :) [best 50MB/s]
SDR104 @ 96MHz : D0 D0 r:43MB/s w:41MB/s W:41MB/s R:44MB/s meh [best 50MB/s]
SDR104 @ 96MHz : D1 D1 r:43MB/s w:41MB/s W:40MB/s R:43MB/s meh [best 50MB/s]
SDR104 @ 80MHz : D0 D0 r:36MB/s w:35MB/s W:34MB/s R:36MB/s meh [best 50MB/s]
SDR104 @ 80MHz : D1 D1 r:36MB/s w:35MB/s W:33MB/s R:36MB/s meh [best 50MB/s]
SDR104 @ 120MHz: D0 D0 r:52MB/s w:50MB/s W:49MB/s R:54MB/s ::) [best 50MB/s]
SDR104 @ 120MHz: D1 D1 r:53MB/s w:50MB/s W:49MB/s R:54MB/s :) [best 50MB/s]
SDR104 @ 132MHz: D0 D0 r:49MB/s w:47MB/s W:30MB/s R:49MB/s ::) [best 50MB/s]
SDR104 @ 132MHz: D1 D1 r:49MB/s w:47MB/s W:44MB/s R:50MB/s ::) [best 50MB/s]
SDR104 @ 160MHz: D0 D0 r:69MB/s w:65MB/s W:65MB/s R:72MB/s 8) [best 65MB/s]
SDR104 @ 160MHz: D1 D1 r:69MB/s w:65MB/s W:64MB/s R:72MB/s :) [best 65MB/s]
SDR104 @ 160MHz: D2 D2 r:69MB/s w:66MB/s W:63MB/s R:72MB/s :) [best 66MB/s]
SDR104 @ 160MHz: D3 D3 r:69MB/s w:65MB/s W:61MB/s R:72MB/s ::) [best 66MB/s]
SDR104 @ 160MHz: D0 D0 r:69MB/s w:65MB/s W:63MB/s R:72MB/s ::) [best 66MB/s]
SDR104 @ 160MHz: D1 D1 r:69MB/s w:65MB/s W:63MB/s R:72MB/s ::) [best 66MB/s]
SDR104 @ 160MHz: D2 D2 r:69MB/s w:65MB/s W:41MB/s R:72MB/s ::) [best 66MB/s]
SDR104 @ 160MHz: D3 D3 r:69MB/s w:65MB/s W:64MB/s R:72MB/s ::) [best 66MB/s]
SDR104 @ 160MHz: D0 D0 r:69MB/s w:65MB/s W:64MB/s R:71MB/s ::) [best 66MB/s]
SDR104 @ 160MHz: D1 D1 r:69MB/s w:65MB/s W:63MB/s R:71MB/s ::) [best 66MB/s]
SDR104 @ 160MHz: D2 D2 r:69MB/s w:65MB/s W:60MB/s R:71MB/s ::) [best 66MB/s]
SDR104 @ 160MHz: D3 D3 r:69MB/s w:65MB/s W:63MB/s R:71MB/s ::) [best 66MB/s]
SDR104 @ 160MHz: D0 D0 r:70MB/s w:66MB/s W:62MB/s R:72MB/s ::) [best 66MB/s]
SDR104 @ 160MHz: D1 D1 r:69MB/s w:65MB/s W:63MB/s R:72MB/s ::) [best 66MB/s]
SDR104 @ 160MHz: D2 D2 r:70MB/s w:65MB/s W:41MB/s R:71MB/s ::) [best 66MB/s]
SDR104 @ 160MHz: D3 D3 r:69MB/s w:65MB/s W:63MB/s R:72MB/s ::) [best 66MB/s]
Best: D2 D2 r:69MB/s w:65MB/s W:63MB/s R:72MB/s ::) [best 66MB/s]
Best: D2 D2 r:70MB/s w:65MB/s W:61MB/s R:71MB/s ::) [best 66MB/s]
Done.
Please run THOROUGH tests before using!!!
Press shutter halfway during these tests (until it starts running some more), then let it run overnight on the power adapter, then press shutter halfway again to stop.
Does this happen on smaller cards from the same series?
Those V "settings" are just labels.
OK, same card then apart from the size obviously.
Indeed, D settings not showing is a bad sign. Can you enable the printf from sd_set_function_log? (replace qprintf with log_printf). The former only goes to QEMU console, the latter goes to the screen and in the log file, too. Attach the full log file (from ML/LOGS).
===================
2018/04/05 15:36:04
===================
Before the hack: r:42MB/s w:40MB/s W:40MB/s R:44MB/s 8) [best 40MB/s]
SDR50 @ 96MHz : r:42MB/s w:24MB/s W:39MB/s R:44MB/s meh [best 40MB/s]
SDR50 @ 96MHz : r:42MB/s w:40MB/s W:39MB/s R:43MB/s :) [best 40MB/s]
SDR50 @ 80MHz : r:35MB/s w:34MB/s W:34MB/s R:36MB/s meh [best 40MB/s]
SDR50 @ 80MHz : r:35MB/s w:34MB/s W:34MB/s R:36MB/s meh [best 40MB/s]
SDR50 @ 120MHz : r:52MB/s w:44MB/s W:43MB/s R:54MB/s :) [best 44MB/s]
SDR50 @ 120MHz : r:52MB/s w:43MB/s W:43MB/s R:54MB/s ::) [best 44MB/s]
SDR104 @ 96MHz : sd_set_function(0xff0002)
D0 sd_set_function(0xff0002)
D0 r:42MB/s w:40MB/s W:40MB/s R:43MB/s ::) [best 44MB/s]
SDR104 @ 96MHz : sd_set_function(0xff0002)
D1 sd_set_function(0xff0002)
D1 r:42MB/s w:40MB/s W:40MB/s R:43MB/s ::) [best 44MB/s]
SDR104 @ 80MHz : sd_set_function(0xff0002)
D0 sd_set_function(0xff0002)
D0 r:35MB/s w:34MB/s W:34MB/s R:36MB/s meh [best 44MB/s]
SDR104 @ 80MHz : sd_set_function(0xff0002)
D1 sd_set_function(0xff0002)
D1 r:36MB/s w:34MB/s W:34MB/s R:36MB/s meh [best 44MB/s]
SDR104 @ 120MHz: sd_set_function(0xff0002)
D0 sd_set_function(0xff0002)
D0 r:51MB/s w:44MB/s W:43MB/s R:54MB/s :) [best 44MB/s]
SDR104 @ 120MHz: sd_set_function(0xff0002)
D1 sd_set_function(0xff0002)
D1 r:52MB/s w:44MB/s W:43MB/s R:54MB/s ::) [best 44MB/s]
SDR104 @ 132MHz: sd_set_function(0xff0002)
D0 sd_set_function(0xff0002)
D0 r:57MB/s w:44MB/s W:43MB/s R:59MB/s ::) [best 44MB/s]
SDR104 @ 132MHz: sd_set_function(0xff0002)
D1 sd_set_function(0xff0002)
D1 r:57MB/s w:44MB/s W:43MB/s R:60MB/s ::) [best 44MB/s]
SDR104 @ 160MHz: sd_set_function(0xff0002)
D0 sd_set_function(0xff0002)
D0 r:58MB/s w:sd_set_function(0xffff01)
15MB/s W:21MB/s R:22MB/s ??? [best 44MB/s]
SDR104 @ 160MHz: sd_set_function(0xffff01)
sd_set_function(0xffff01)
r:21MB/s w:21MB/s W:21MB/s R:22MB/s ??? [best 44MB/s]
SDR104 @ 160MHz: sd_set_function(0xffff01)
sd_set_function(0xffff01)
r:21MB/s w:21MB/s W:20MB/s R:22MB/s ??? [best 44MB/s]
SDR104 @ 160MHz: sd_set_function(0xffff01)
sd_set_function(0xffff01)
r:21MB/s w:15MB/s W:21MB/s R:22MB/s ??? [best 44MB/s]
SDR104 @ 160MHz: sd_set_function(0xffff01)
sd_set_function(0xffff01)
r:20MB/s w:21MB/s W:20MB/s R:22MB/s ??? [best 44MB/s]
SDR104 @ 160MHz: sd_set_function(0xffff01)
sd_set_function(0xffff01)
r:21MB/s w:21MB/s W:20MB/s R:22MB/s ??? [best 44MB/s]
SDR104 @ 160MHz: sd_set_function(0xffff01)
sd_set_function(0xffff01)
r:21MB/s w:21MB/s W:21MB/s R:22MB/s ??? [best 44MB/s]
SDR104 @ 160MHz: sd_set_function(0xffff01)
sd_set_function(0xffff01)
r:21MB/s w:14MB/s W:21MB/s R:22MB/s ??? [best 44MB/s]
SDR104 @ 160MHz: sd_set_function(0xffff01)
sd_set_function(0xffff01)
r:21MB/s w:21MB/s W:21MB/s R:22MB/s ??? [best 44MB/s]
SDR104 @ 160MHz: sd_set_function(0xffff01)
sd_set_function(0xffff01)
r:21MB/s w:21MB/s W:21MB/s R:22MB/s ??? [best 44MB/s]
SDR104 @ 160MHz: sd_set_function(0xffff01)
sd_set_function(0xffff01)
r:21MB/s w:21MB/s W:21MB/s R:22MB/s ??? [best 44MB/s]
SDR104 @ 160MHz: sd_set_function(0xffff01)
sd_set_function(0xffff01)
r:21MB/s w:21MB/s W:21MB/s R:22MB/s ??? [best 44MB/s]
SDR104 @ 160MHz: sd_set_function(0xffff01)
sd_set_function(0xffff01)
r:21MB/s w:21MB/s W:21MB/s R:22MB/s ??? [best 44MB/s]
SDR104 @ 160MHz: sd_set_function(0xffff01)
sd_set_function(0xffff01)
r:21MB/s w:21MB/s W:21MB/s R:22MB/s ??? [best 44MB/s]
SDR104 @ 160MHz: sd_set_function(0xffff01)
sd_set_function(0xffff01)
r:21MB/s w:21MB/s W:21MB/s R:22MB/s ??? [best 44MB/s]
SDR104 @ 160MHz: sd_set_function(0xffff01)
sd_set_function(0xffff01)
r:22MB/s w:21MB/s W:20MB/s R:22MB/s ??? [best 44MB/s]
Best: sd_set_function(0xffff01)
sd_set_function(0xffff01)
r:22MB/s w:21MB/s W:21MB/s R:22MB/s ??? [best 44MB/s]
Best: sd_set_function(0xffff01)
sd_set_function(0xffff01)
r:22MB/s w:21MB/s W:20MB/s R:22MB/s ??? [best 44MB/s]
Done.
Please run THOROUGH tests before using!!!
@Markus
Are you running the test in photo mode as when I tried it in video mode I got loads of crazy stuff coming up.
Just a thought..
Those huge numbers sound like an uncaught error in the benchmark code.
Ouch, that's not good. Can you try the card on a Linux PC (possibly an Ubuntu Live CD/USB (https://tutorials.ubuntu.com/tutorial/tutorial-create-a-usb-stick-on-windows)) and show the last lines from "dmesg" after inserting it?
Those huge numbers sound like an uncaught error in the benchmark code.
Going to order one of these (https://www.sparkfun.com/products/11468) to check the signals, to make sure the controller is not somehow switching back to 3.3V while the card is in UHS mode (1.8V). Meanwhile, found out what driver strength means (http://lkml.iu.edu/hypermail/linux/kernel/1502.2/00270.html), and reverted the module to the previous changeset, just in case.
Do not try on expensive cards until we figure out what happened!
===================
2018/04/06 22:29:28
===================
Before the hack: r:37MB/s w:34MB/s W:32MB/s R:37MB/s :) [best 34MB/s]
SDR50 @ 96MHz : r:37MB/s w:32MB/s W:33MB/s R:37MB/s meh [best 34MB/s]
SDR50 @ 96MHz : r:37MB/s w:19MB/s W:33MB/s R:38MB/s meh [best 34MB/s]
SDR50 @ 80MHz : r:32MB/s w:30MB/s W:28MB/s R:32MB/s meh [best 34MB/s]
SDR50 @ 80MHz : r:36MB/s w:34MB/s W:35MB/s R:37MB/s :) [best 34MB/s]
SDR50 @ 120MHz : r:54MB/s w:52MB/s W:52MB/s R:55MB/s :) [best 52MB/s]
SDR50 @ 120MHz : r:54MB/s w:50MB/s W:52MB/s R:55MB/s meh [best 52MB/s]
SDR104 @ 96MHz : r:44MB/s w:42MB/s W:42MB/s R:44MB/s meh [best 52MB/s]
SDR104 @ 96MHz : r:44MB/s w:41MB/s W:42MB/s R:44MB/s meh [best 52MB/s]
SDR104 @ 80MHz : r:37MB/s w:35MB/s W:36MB/s R:37MB/s meh [best 52MB/s]
SDR104 @ 80MHz : r:37MB/s w:35MB/s W:35MB/s R:37MB/s meh [best 52MB/s]
SDR104 @ 120MHz: r:55MB/s w:53MB/s W:52MB/s R:55MB/s :) [best 53MB/s]
SDR104 @ 120MHz: r:54MB/s w:51MB/s W:50MB/s R:55MB/s meh [best 53MB/s]
SDR104 @ 132MHz: r:51MB/s w:48MB/s W:48MB/s R:51MB/s meh [best 53MB/s]
SDR104 @ 132MHz: r:50MB/s w:48MB/s W:48MB/s R:51MB/s meh [best 53MB/s]
SDR104 @ 160MHz: r:72MB/s w:70MB/s W:67MB/s R:73MB/s :) [best 70MB/s]
SDR104 @ 160MHz: r:72MB/s w:68MB/s W:64MB/s R:73MB/s meh [best 70MB/s]
Done.
Please run THOROUGH tests before using!!!
===================
2018/04/07 03:11:29
===================
Before the hack: r:43MB/s w:41MB/s W:39MB/s R:43MB/s 8) [best 41MB/s]
SDR50 @ 96MHz : r:43MB/s w:41MB/s W:40MB/s R:44MB/s ::) [best 41MB/s]
SDR50 @ 96MHz : r:43MB/s w:41MB/s W:40MB/s R:43MB/s :) [best 41MB/s]
SDR50 @ 80MHz : r:36MB/s w:35MB/s W:34MB/s R:36MB/s meh [best 41MB/s]
SDR50 @ 80MHz : r:36MB/s w:35MB/s W:34MB/s R:36MB/s meh [best 41MB/s]
SDR50 @ 120MHz : r:53MB/s w:47MB/s W:45MB/s R:54MB/s 8) [best 47MB/s]
SDR50 @ 120MHz : r:53MB/s w:47MB/s W:45MB/s R:54MB/s ::) [best 47MB/s]
SDR104 @ 96MHz : r:43MB/s w:23MB/s W:22MB/s R:43MB/s ??? [best 47MB/s]
SDR104 @ 96MHz : r:43MB/s w:23MB/s W:22MB/s R:43MB/s ??? [best 47MB/s]
SDR104 @ 80MHz : r:36MB/s w:21MB/s W:20MB/s R:36MB/s ??? [best 47MB/s]
SDR104 @ 80MHz : r:36MB/s w:21MB/s W:20MB/s R:36MB/s ??? [best 47MB/s]
SDR104 @ 120MHz: r:45MB/s w:25MB/s W:25MB/s R:46MB/s meh [best 47MB/s]
SDR104 @ 120MHz: r:45MB/s w:25MB/s W:25MB/s R:46MB/s meh [best 47MB/s]
SDR104 @ 132MHz: r:45MB/s w:24MB/s W:24MB/s R:46MB/s meh [best 47MB/s]
SDR104 @ 132MHz: r:45MB/s w:24MB/s W:24MB/s R:46MB/s meh [best 47MB/s]
SDR104 @ 160MHz: r:45MB/s w:15MB/s W:20MB/s R:22MB/s ??? [best 47MB/s]
SDR104 @ 160MHz: r:22MB/s w:21MB/s W:21MB/s R:22MB/s ??? [best 47MB/s]
Best: r:22MB/s w:21MB/s W:20MB/s R:22MB/s ??? [best 47MB/s]
Best: r:22MB/s w:21MB/s W:20MB/s R:22MB/s ??? [best 47MB/s]
Done.
Please run THOROUGH tests before using!!!
===================
2018/04/07 02:52:24
===================
Before the hack: r:44MB/s w:41MB/s W:41MB/s R:44MB/s 8) [best 41MB/s]
SDR50 @ 96MHz : r:44MB/s w:40MB/s W:41MB/s R:44MB/s ::) [best 41MB/s]
SDR50 @ 96MHz : r:44MB/s w:41MB/s W:41MB/s R:44MB/s ::) [best 41MB/s]
SDR50 @ 80MHz : r:37MB/s w:34MB/s W:35MB/s R:37MB/s meh [best 41MB/s]
SDR50 @ 80MHz : r:37MB/s w:33MB/s W:34MB/s R:37MB/s meh [best 41MB/s]
SDR50 @ 120MHz : r:55MB/s w:50MB/s W:49MB/s R:55MB/s 8) [best 50MB/s]
SDR50 @ 120MHz : r:55MB/s w:52MB/s W:50MB/s R:55MB/s :) [best 52MB/s]
SDR104 @ 96MHz : r:44MB/s w:40MB/s W:41MB/s R:44MB/s meh [best 52MB/s]
SDR104 @ 96MHz : r:44MB/s w:40MB/s W:41MB/s R:44MB/s meh [best 52MB/s]
SDR104 @ 80MHz : r:37MB/s w:34MB/s W:35MB/s R:37MB/s meh [best 52MB/s]
SDR104 @ 80MHz : r:37MB/s w:36MB/s W:35MB/s R:37MB/s meh [best 52MB/s]
SDR104 @ 120MHz: r:55MB/s w:49MB/s W:50MB/s R:55MB/s ::) [best 52MB/s]
SDR104 @ 120MHz: r:55MB/s w:48MB/s W:52MB/s R:55MB/s ::) [best 52MB/s]
SDR104 @ 132MHz: r:51MB/s w:46MB/s W:48MB/s R:51MB/s meh [best 52MB/s]
SDR104 @ 132MHz: r:51MB/s w:49MB/s W:47MB/s R:51MB/s ::) [best 52MB/s]
SDR104 @ 160MHz: r:73MB/s w:64MB/s W:65MB/s R:72MB/s 8) [best 64MB/s]
SDR104 @ 160MHz: r:72MB/s w:61MB/s W:67MB/s R:72MB/s ::) [best 64MB/s]
Best: r:73MB/s w:64MB/s W:66MB/s R:72MB/s :) [best 64MB/s]
Best: r:72MB/s w:68MB/s W:64MB/s R:72MB/s :) [best 68MB/s]
Done.
Please run THOROUGH tests before using!!!
===================
2018/04/07 16:05:21
===================
Before the hack: r:44MB/s w:42MB/s W:42MB/s R:44MB/s :) [best 42MB/s]
SDR50 @ 96MHz : r:44MB/s w:40MB/s W:41MB/s R:44MB/s meh [best 42MB/s]
SDR50 @ 96MHz : r:43MB/s w:43MB/s W:43MB/s R:43MB/s :) [best 43MB/s]
SDR50 @ 80MHz : r:36MB/s w:35MB/s W:35MB/s R:36MB/s meh [best 43MB/s]
SDR50 @ 80MHz : r:36MB/s w:36MB/s W:36MB/s R:36MB/s meh [best 43MB/s]
SDR50 @ 120MHz : r:54MB/s w:53MB/s W:51MB/s R:54MB/s :) [best 53MB/s]
SDR50 @ 120MHz : r:54MB/s w:52MB/s W:53MB/s R:54MB/s meh [best 53MB/s]
SDR104 @ 96MHz : r:44MB/s w:41MB/s W:41MB/s R:43MB/s meh [best 53MB/s]
SDR104 @ 96MHz : r:43MB/s w:43MB/s W:42MB/s R:44MB/s meh [best 53MB/s]
SDR104 @ 80MHz : r:36MB/s w:35MB/s W:35MB/s R:36MB/s meh [best 53MB/s]
SDR104 @ 80MHz : r:36MB/s w:36MB/s W:36MB/s R:36MB/s meh [best 53MB/s]
SDR104 @ 120MHz: r:54MB/s w:53MB/s W:51MB/s R:54MB/s :) [best 53MB/s]
SDR104 @ 120MHz: r:54MB/s w:52MB/s W:53MB/s R:54MB/s meh [best 53MB/s]
SDR104 @ 132MHz: r:60MB/s w:59MB/s W:56MB/s R:60MB/s :) [best 59MB/s]
SDR104 @ 132MHz: r:60MB/s w:58MB/s W:58MB/s R:60MB/s meh [best 59MB/s]
SDR104 @ 160MHz: r:72MB/s w:68MB/s W:67MB/s R:72MB/s :) [best 68MB/s]
SDR104 @ 160MHz: r:72MB/s w:70MB/s W:69MB/s R:72MB/s :) [best 70MB/s]
Done.
Please run THOROUGH tests before using!!!
Before the hack: r:22MB/s w:19MB/s W:21MB/s R:22MB/s 8) [best 19MB/s]
SDR50 @ 96MHz : r:43MB/s w:23MB/s W:18MB/s R:43MB/s 8) [best 23MB/s]
SDR50 @ 96MHz : r:43MB/s w:19MB/s W:16MB/s R:43MB/s meh [best 23MB/s]
SDR50 @ 80MHz : r:36MB/s w:12MB/s W:19MB/s R:36MB/s meh [best 23MB/s]
SDR50 @ 80MHz : r:36MB/s w:16MB/s W:12MB/s R:36MB/s meh [best 23MB/s]
SDR50 @ 120MHz : r:54MB/s w:19MB/s W:12MB/s R:54MB/s meh [best 23MB/s]
SDR50 @ 120MHz : r:54MB/s w:17MB/s W:15MB/s R:54MB/s meh [best 23MB/s]
SDR104 @ 96MHz : r:43MB/s w:20MB/s W:15MB/s R:43MB/s meh [best 23MB/s]
SDR104 @ 96MHz : r:43MB/s w:24MB/s W:21MB/s R:43MB/s :) [best 24MB/s]
SDR104 @ 80MHz : r:36MB/s w:18MB/s W:21MB/s R:36MB/s meh [best 24MB/s]
SDR104 @ 80MHz : r:36MB/s w:33MB/s W:12MB/s R:36MB/s 8) [best 33MB/s]
SDR104 @ 120MHz: r:54MB/s w:16MB/s W:17MB/s R:ERR
SDR104 @ 120MHz: r:err [SAFE] [BACK]
SDR104 @ 132MHz: r:60MB/s w:45MB/s W:27MB/s R:ERR
SDR104 @ 132MHz: r:err [SAFE] [BACK]
SDR104 @ 160MHz: r:71MB/s w:18MB/s W:14MB/s R:ERR
SDR104 @ 160MHz: r:err [SAFE] [BACK]
Best: r:36MB/s w:13MB/s W:24MB/s R:36MB/s ??? [best 33MB/s]
Best: r:36MB/s w:16MB/s W:21MB/s R:36MB/s ??? [best 33MB/s]
Done.
Please run THOROUGH tests before using!!!
Before the hack: r:22MB/s w:16MB/s W:19MB/s R:22MB/s 8) [best 16MB/s]
SDR50 @ 96MHz : r:43MB/s w:22MB/s W:19MB/s R:43MB/s 8) [best 22MB/s]
SDR50 @ 96MHz : r:43MB/s w:21MB/s W:26MB/s R:43MB/s ::) [best 22MB/s]
SDR50 @ 80MHz : r:36MB/s w:20MB/s W:26MB/s R:36MB/s ::) [best 22MB/s]
SDR50 @ 80MHz : r:36MB/s w:23MB/s W:26MB/s R:36MB/s :) [best 23MB/s]
SDR50 @ 120MHz : r:54MB/s w:24MB/s W:29MB/s R:54MB/s :) [best 24MB/s]
SDR50 @ 120MHz : r:54MB/s w:37MB/s W:39MB/s R:54MB/s 8) [best 37MB/s]
SDR104 @ 96MHz : r:43MB/s w:30MB/s W:22MB/s R:43MB/s meh [best 37MB/s]
SDR104 @ 96MHz : r:43MB/s w:26MB/s W:27MB/s R:43MB/s meh [best 37MB/s]
SDR104 @ 80MHz : r:36MB/s w:29MB/s W:33MB/s R:36MB/s meh [best 37MB/s]
SDR104 @ 80MHz : r:36MB/s w:36MB/s W:26MB/s R:36MB/s ::) [best 37MB/s]
SDR104 @ 120MHz: r:err [SAFE] [BACK]
SDR104 @ 120MHz: r:err [SAFE] [BACK]
SDR104 @ 132MHz: r:err [SAFE] [BACK]
SDR104 @ 132MHz: r:err [SAFE] [BACK]
SDR104 @ 160MHz: r:err [SAFE] [BACK]
SDR104 @ 160MHz: r:err [SAFE] [BACK]
Best: r:err [SAFE] [BACK]
Best: r:err [SAFE] [BACK]
Done.
Please run THOROUGH tests before using!!!
Before the hack: r:22MB/s w:18MB/s W:16MB/s R:22MB/s 8) [best 18MB/s]
SDR50 @ 96MHz : r:43MB/s w:18MB/s W:19MB/s R:43MB/s :) [best 18MB/s]
SDR50 @ 96MHz : r:43MB/s w:18MB/s W:19MB/s R:43MB/s ::) [best 18MB/s]
SDR50 @ 80MHz : r:36MB/s w:18MB/s W:18MB/s R:36MB/s ::) [best 18MB/s]
SDR50 @ 80MHz : r:36MB/s w:18MB/s W:18MB/s R:36MB/s ::) [best 18MB/s]
SDR50 @ 120MHz : r:54MB/s w:19MB/s W:19MB/s R:54MB/s :) [best 19MB/s]
SDR50 @ 120MHz : r:54MB/s w:19MB/s W:19MB/s R:53MB/s :) [best 19MB/s]
SDR104 @ 96MHz : r:43MB/s w:18MB/s W:19MB/s R:43MB/s ::) [best 19MB/s]
SDR104 @ 96MHz : r:43MB/s w:19MB/s W:18MB/s R:43MB/s ::) [best 19MB/s]
SDR104 @ 80MHz : r:36MB/s w:17MB/s W:17MB/s R:36MB/s meh [best 19MB/s]
SDR104 @ 80MHz : r:36MB/s w:16MB/s W:16MB/s R:36MB/s meh [best 19MB/s]
SDR104 @ 120MHz: r:54MB/s w:18MB/s W:18MB/s R:54MB/s ::) [best 19MB/s]
SDR104 @ 120MHz: r:54MB/s w:18MB/s W:18MB/s R:54MB/s ::) [best 19MB/s]
SDR104 @ 132MHz: r:59MB/s w:18MB/s W:18MB/s R:59MB/s ::) [best 19MB/s]
SDR104 @ 132MHz: r:60MB/s w:18MB/s W:18MB/s R:59MB/s ::) [best 19MB/s]
SDR104 @ 160MHz: r:71MB/s w:18MB/s W:18MB/s R:70MB/s ::) [best 19MB/s]
SDR104 @ 160MHz: r:71MB/s w:18MB/s W:18MB/s R:70MB/s ::) [best 19MB/s]
Best: r:54MB/s w:18MB/s W:18MB/s R:54MB/s ::) [best 19MB/s]
Best: r:54MB/s w:18MB/s W:18MB/s R:54MB/s ::) [best 19MB/s]
Done.
Please run THOROUGH tests before using!!!
Before the hack: r:22MB/s w:6.1MB/s W:6.8MB/s R:22MB/s 8) [best 6.1MB/s]
SDR50 @ 96MHz : r:43MB/s w:9.2MB/s W:8.2MB/s R:43MB/s 8) [best 9.2MB/s]
SDR50 @ 96MHz : r:43MB/s w:9.1MB/s W:5.8MB/s R:43MB/s ::) [best 9.2MB/s]
SDR50 @ 80MHz : r:36MB/s w:8.9MB/s W:12MB/s R:36MB/s ::) [best 9.2MB/s]
SDR50 @ 80MHz : r:36MB/s w:9.0MB/s W:12MB/s R:36MB/s ::) [best 9.2MB/s]
SDR50 @ 120MHz : r:err [SAFE] [BACK]
SDR50 @ 120MHz : r:err [SAFE] [BACK]
SDR104 @ 96MHz : r:43MB/s w:ERR [SAFE] !!! [BACK]
SDR104 @ 96MHz : r:35MB/s w:ERR [SAFE] !!! [BACK]
SDR104 @ 80MHz : r:33MB/s w:ERR [SAFE] !!! [BACK]
SDR104 @ 80MHz : r:33MB/s w:ERR [SAFE] !!! [BACK]
SDR104 @ 120MHz: r:err [SAFE] [BACK]
SDR104 @ 120MHz: r:err [SAFE] [BACK]
SDR104 @ 132MHz: r:err [SAFE] [BACK]
SDR104 @ 132MHz: r:err [SAFE] [BACK]
SDR104 @ 160MHz: r:err [SAFE] [BACK]
SDR104 @ 160MHz: r:err [SAFE] [BACK]
Best: r:34MB/s w:ERR [SAFE] !!! [BACK]
Best: r:34MB/s w:ERR [SAFE] !!! [BACK]
Done.
Please run THOROUGH tests before using!!!
Before the hack: r:21MB/s w:11MB/s W:20MB/s R:19MB/s 8) [best 11MB/s]
SDR50 @ 96MHz : r:22MB/s w:11MB/s W:21MB/s R:21MB/s :) [best 11MB/s]
SDR50 @ 96MHz : r:22MB/s w:11MB/s W:10MB/s R:21MB/s ::) [best 11MB/s]
SDR50 @ 80MHz : r:22MB/s w:11MB/s W:21MB/s R:20MB/s ::) [best 11MB/s]
SDR50 @ 80MHz : r:22MB/s w:11MB/s W:11MB/s R:20MB/s ::) [best 11MB/s]
SDR50 @ 120MHz : r:22MB/s w:11MB/s W:21MB/s R:20MB/s :) [best 11MB/s]
SDR50 @ 120MHz : r:22MB/s w:11MB/s W:11MB/s R:20MB/s :) [best 11MB/s]
SDR104 @ 96MHz : r:22MB/s w:11MB/s W:11MB/s R:21MB/s ::) [best 11MB/s]
SDR104 @ 96MHz : r:22MB/s w:11MB/s W:21MB/s R:21MB/s :) [best 11MB/s]
SDR104 @ 80MHz : r:22MB/s w:11MB/s W:21MB/s R:20MB/s ::) [best 11MB/s]
SDR104 @ 80MHz : r:22MB/s w:11MB/s W:11MB/s R:20MB/s ::) [best 11MB/s]
SDR104 @ 120MHz: r:22MB/s w:11MB/s W:11MB/s R:20MB/s ::) [best 11MB/s]
SDR104 @ 120MHz: r:22MB/s w:11MB/s W:11MB/s R:20MB/s ::) [best 11MB/s]
SDR104 @ 132MHz: r:22MB/s w:11MB/s W:21MB/s R:20MB/s ::) [best 11MB/s]
SDR104 @ 132MHz: r:22MB/s w:11MB/s W:21MB/s R:20MB/s ::) [best 11MB/s]
SDR104 @ 160MHz: r:22MB/s w:11MB/s W:11MB/s R:21MB/s ::) [best 11MB/s]
SDR104 @ 160MHz: r:22MB/s w:11MB/s W:11MB/s R:20MB/s ::) [best 11MB/s]
Best: r:22MB/s w:11MB/s W:21MB/s R:20MB/s ::) [best 11MB/s]
Best: r:22MB/s w:11MB/s W:21MB/s R:20MB/s ::) [best 11MB/s]
Done.
Please run THOROUGH tests before using!!!
Before the hack: r:22MB/s w:14MB/s W:10MB/s R:22MB/s 8) [best 14MB/s]
SDR50 @ 96MHz : sd_check_function =>
00C8 8001 8001 800F 800F 8001 801F 0000
8001 800F 800F 8001 801F 0000 0100 0000
800F 8001 801F 0000 0100 0000 0000 0000
801F 0000 0100 0000 0000 0000 0000 0000
Switch Function Status version 0
Max current: 200 mA
Function group 6 (Reserved) 0 (supported 0,F)
Function group 5 (Reserved) 0 (supported 0,F)
Function group 4 (Power Limit) 0 (supported 0,1,2,3,F)
Function group 3 (Driver Strength) 0 (supported 0,1,2,3,F)
Function group 2 (Command System) 0 (supported 0,F)
Function group 1 (Access Mode) 1 (supported 0,1,2,3,4,F)
sd_set_function =>
0190 8001 8001 800F 800F 8001 801F 0000
8001 800F 800F 8001 801F 0000 0200 0000
800F 8001 801F 0000 0200 0000 0000 0000
801F 0000 0200 0000 0000 0000 0000 0000
Switch Function Status version 0
Max current: 400 mA
Function group 6 (Reserved) 0 (supported 0,F)
Function group 5 (Reserved) 0 (supported 0,F)
Function group 4 (Power Limit) 0 (supported 0,1,2,3,F)
Function group 3 (Driver Strength) 0 (supported 0,1,2,3,F)
Function group 2 (Command System) 0 (supported 0,F)
Function group 1 (Access Mode) 2 (supported 0,1,2,3,4,F)
r:43MB/s w:18MB/s W:18MB/s R:43MB/s 8) [best 18MB/s]
SDR50 @ 96MHz : sd_set_function =>
0190 8001 8001 800F 800F 8001 801F 0000
8001 800F 800F 8001 801F 0000 0200 0000
800F 8001 801F 0000 0200 0000 0000 0000
801F 0000 0200 0000 0000 0000 0000 0000
Switch Function Status version 0
Max current: 400 mA
Function group 6 (Reserved) 0 (supported 0,F)
Function group 5 (Reserved) 0 (supported 0,F)
Function group 4 (Power Limit) 0 (supported 0,1,2,3,F)
Function group 3 (Driver Strength) 0 (supported 0,1,2,3,F)
Function group 2 (Command System) 0 (supported 0,F)
Function group 1 (Access Mode) 2 (supported 0,1,2,3,4,F)
r:43MB/s w:18MB/s W:18MB/s R:43MB/s :) [best 18MB/s]
Best: sd_set_function =>
0190 8001 8001 800F 800F 8001 801F 0000
8001 800F 800F 8001 801F 0000 0200 0000
800F 8001 801F 0000 0200 0000 0000 0000
801F 0000 0200 0000 0000 0000 0000 0000
Switch Function Status version 0
Max current: 400 mA
Function group 6 (Reserved) 0 (supported 0,F)
Function group 5 (Reserved) 0 (supported 0,F)
Function group 4 (Power Limit) 0 (supported 0,1,2,3,F)
Function group 3 (Driver Strength) 0 (supported 0,1,2,3,F)
Function group 2 (Command System) 0 (supported 0,F)
Function group 1 (Access Mode) 2 (supported 0,1,2,3,4,F)
r:43MB/s w:18MB/s W:17MB/s R:43MB/s :) [best 18MB/s]
Best: sd_set_function =>
0190 8001 8001 800F 800F 8001 801F 0000
8001 800F 800F 8001 801F 0000 0200 0000
800F 8001 801F 0000 0200 0000 0000 0000
801F 0000 0200 0000 0000 0000 0000 0000
Switch Function Status version 0
Max current: 400 mA
Function group 6 (Reserved) 0 (supported 0,F)
Function group 5 (Reserved) 0 (supported 0,F)
Function group 4 (Power Limit) 0 (supported 0,1,2,3,F)
Function group 3 (Driver Strength) 0 (supported 0,1,2,3,F)
Function group 2 (Command System) 0 (supported 0,F)
Function group 1 (Access Mode) 2 (supported 0,1,2,3,4,F)
r:43MB/s w:17MB/s W:17MB/s R:43MB/s ::) [best 18MB/s]
Done.
Please run THOROUGH tests before using!!!
Before the hack: r:22MB/s w:19MB/s W:12MB/s R:22MB/s 8) [best 19MB/s]
SDR50 @ 96MHz : sd_check_function =>
00C8 8001 8001 800F 800F C001 801F 0000
8001 800F 800F C001 801F 0000 0100 0000
800F C001 801F 0000 0100 0000 0000 0000
801F 0000 0100 0000 0000 0000 0000 0000
Switch Function Status version 0
Max current: 200 mA
Function group 6 (Reserved) 0 (supported 0,F)
Function group 5 (Reserved) 0 (supported 0,F)
Function group 4 (Power Limit) 0 (supported 0,1,2,3,F)
Function group 3 (Driver Strength) 0 (supported 0,1,2,3,F)
Function group 2 (Command System) 0 (supported 0,E,F)
Function group 1 (Access Mode) 1 (supported 0,1,2,3,4,F)
sd_set_function =>
00C8 8001 8001 800F 800F C001 801F 0000
8001 800F 800F C001 801F 0000 0200 0000
800F C001 801F 0000 0200 0000 0000 0000
801F 0000 0200 0000 0000 0000 0000 0000
Switch Function Status version 0
Max current: 200 mA
Function group 6 (Reserved) 0 (supported 0,F)
Function group 5 (Reserved) 0 (supported 0,F)
Function group 4 (Power Limit) 0 (supported 0,1,2,3,F)
Function group 3 (Driver Strength) 0 (supported 0,1,2,3,F)
Function group 2 (Command System) 0 (supported 0,E,F)
Function group 1 (Access Mode) 2 (supported 0,1,2,3,4,F)
r:43MB/s w:22MB/s W:32MB/s R:43MB/s 8) [best 22MB/s]
SDR50 @ 96MHz : sd_set_function =>
00C8 8001 8001 800F 800F C001 801F 0000
8001 800F 800F C001 801F 0000 0200 0000
800F C001 801F 0000 0200 0000 0000 0000
801F 0000 0200 0000 0000 0000 0000 0000
Switch Function Status version 0
Max current: 200 mA
Function group 6 (Reserved) 0 (supported 0,F)
Function group 5 (Reserved) 0 (supported 0,F)
Function group 4 (Power Limit) 0 (supported 0,1,2,3,F)
Function group 3 (Driver Strength) 0 (supported 0,1,2,3,F)
Function group 2 (Command System) 0 (supported 0,E,F)
Function group 1 (Access Mode) 2 (supported 0,1,2,3,4,F)
r:43MB/s w:33MB/s W:24MB/s R:43MB/s 8) [best 33MB/s]
Best: sd_set_function =>
00C8 8001 8001 800F 800F C001 801F 0000
8001 800F 800F C001 801F 0000 0200 0000
800F C001 801F 0000 0200 0000 0000 0000
801F 0000 0200 0000 0000 0000 0000 0000
Switch Function Status version 0
Max current: 200 mA
Function group 6 (Reserved) 0 (supported 0,F)
Function group 5 (Reserved) 0 (supported 0,F)
Function group 4 (Power Limit) 0 (supported 0,1,2,3,F)
Function group 3 (Driver Strength) 0 (supported 0,1,2,3,F)
Function group 2 (Command System) 0 (supported 0,E,F)
Function group 1 (Access Mode) 2 (supported 0,1,2,3,4,F)
r:43MB/s w:21MB/s W:25MB/s R:43MB/s meh [best 33MB/s]
Best: sd_set_function =>
00C8 8001 8001 800F 800F C001 801F 0000
8001 800F 800F C001 801F 0000 0200 0000
800F C001 801F 0000 0200 0000 0000 0000
801F 0000 0200 0000 0000 0000 0000 0000
Switch Function Status version 0
Max current: 200 mA
Function group 6 (Reserved) 0 (supported 0,F)
Function group 5 (Reserved) 0 (supported 0,F)
Function group 4 (Power Limit) 0 (supported 0,1,2,3,F)
Function group 3 (Driver Strength) 0 (supported 0,1,2,3,F)
Function group 2 (Command System) 0 (supported 0,E,F)
Function group 1 (Access Mode) 2 (supported 0,1,2,3,4,F)
r:43MB/s w:24MB/s W:25MB/s R:43MB/s meh [best 33MB/s]
Done.
Please run THOROUGH tests before using!!!
Before the hack: r:22MB/s w:6.4MB/s W:6.9MB/s R:22MB/s 8) [best 6.4MB/s]
SDR50 @ 96MHz : sd_check_function =>
0064 8001 8001 800F 800F 8001 8017 0000
8001 800F 800F 8001 8017 0000 0100 0000
800F 8001 8017 0000 0100 0000 0000 0000
8017 0000 0100 0000 0000 0000 0000 0000
Switch Function Status version 0
Max current: 100 mA
Function group 6 (Reserved) 0 (supported 0,F)
Function group 5 (Reserved) 0 (supported 0,F)
Function group 4 (Power Limit) 0 (supported 0,1,2,3,F)
Function group 3 (Driver Strength) 0 (supported 0,1,2,3,F)
Function group 2 (Command System) 0 (supported 0,F)
Function group 1 (Access Mode) 1 (supported 0,1,2,4,F)
sd_set_function =>
0064 8001 8001 800F 800F 8001 8017 0000
8001 800F 800F 8001 8017 0000 0200 0000
800F 8001 8017 0000 0200 0000 0000 0000
8017 0000 0200 0000 0000 0000 0000 0000
Switch Function Status version 0
Max current: 100 mA
Function group 6 (Reserved) 0 (supported 0,F)
Function group 5 (Reserved) 0 (supported 0,F)
Function group 4 (Power Limit) 0 (supported 0,1,2,3,F)
Function group 3 (Driver Strength) 0 (supported 0,1,2,3,F)
Function group 2 (Command System) 0 (supported 0,F)
Function group 1 (Access Mode) 2 (supported 0,1,2,4,F)
r:39MB/s w:7.2MB/s W:8.2MB/s R:43MB/s 8) [best 7.2MB/s]
SDR50 @ 96MHz : sd_set_function =>
0064 8001 8001 800F 800F 8001 8017 0000
8001 800F 800F 8001 8017 0000 0200 0000
800F 8001 8017 0000 0200 0000 0000 0000
8017 0000 0200 0000 0000 0000 0000 0000
Switch Function Status version 0
Max current: 100 mA
Function group 6 (Reserved) 0 (supported 0,F)
Function group 5 (Reserved) 0 (supported 0,F)
Function group 4 (Power Limit) 0 (supported 0,1,2,3,F)
Function group 3 (Driver Strength) 0 (supported 0,1,2,3,F)
Function group 2 (Command System) 0 (supported 0,F)
Function group 1 (Access Mode) 2 (supported 0,1,2,4,F)
r:39MB/s w:7.2MB/s W:5.7MB/s R:43MB/s :) [best 7.2MB/s]
Best: sd_set_function =>
0064 8001 8001 800F 800F 8001 8017 0000
8001 800F 800F 8001 8017 0000 0200 0000
800F 8001 8017 0000 0200 0000 0000 0000
8017 0000 0200 0000 0000 0000 0000 0000
Switch Function Status version 0
Max current: 100 mA
Function group 6 (Reserved) 0 (supported 0,F)
Function group 5 (Reserved) 0 (supported 0,F)
Function group 4 (Power Limit) 0 (supported 0,1,2,3,F)
Function group 3 (Driver Strength) 0 (supported 0,1,2,3,F)
Function group 2 (Command System) 0 (supported 0,F)
Function group 1 (Access Mode) 2 (supported 0,1,2,4,F)
r:39MB/s w:7.2MB/s W:13MB/s R:42MB/s :) [best 7.2MB/s]
Best: sd_set_function =>
0064 8001 8001 800F 800F 8001 8017 0000
8001 800F 800F 8001 8017 0000 0200 0000
800F 8001 8017 0000 0200 0000 0000 0000
8017 0000 0200 0000 0000 0000 0000 0000
Switch Function Status version 0
Max current: 100 mA
Function group 6 (Reserved) 0 (supported 0,F)
Function group 5 (Reserved) 0 (supported 0,F)
Function group 4 (Power Limit) 0 (supported 0,1,2,3,F)
Function group 3 (Driver Strength) 0 (supported 0,1,2,3,F)
Function group 2 (Command System) 0 (supported 0,F)
Function group 1 (Access Mode) 2 (supported 0,1,2,4,F)
r:39MB/s w:7.2MB/s W:13MB/s R:42MB/s :) [best 7.2MB/s]
Done.
Please run THOROUGH tests before using!!!
===================
2018/04/07 18:22:55
===================
Before the hack: r:43MB/s w:42MB/s W:40MB/s R:43MB/s 8) [best 42MB/s]
SDR50 @ 96MHz : sd_check_function =>
00C8 8001 8001 800F 800F C001 801F 0000
8001 800F 800F C001 801F 0000 0100 0000
800F C001 801F 0000 0100 0000 0000 0000
801F 0000 0100 0000 0000 0000 0000 0000
Switch Function Status version 0
Max current: 200 mA
Function group 6 (Reserved) 0 (supported 0,F)
Function group 5 (Reserved) 0 (supported 0,F)
Function group 4 (Power Limit) 0 (supported 0,1,2,3,F)
Function group 3 (Driver Strength) 0 (supported 0,1,2,3,F)
Function group 2 (Command System) 0 (supported 0,E,F)
Function group 1 (Access Mode) 1 (supported 0,1,2,3,4,F)
sd_set_function =>
00C8 8001 8001 800F 800F C001 801F 0000
8001 800F 800F C001 801F 0000 0200 0000
800F C001 801F 0000 0200 0000 0000 0000
801F 0000 0200 0000 0000 0000 0000 0000
Switch Function Status version 0
Max current: 200 mA
Function group 6 (Reserved) 0 (supported 0,F)
Function group 5 (Reserved) 0 (supported 0,F)
Function group 4 (Power Limit) 0 (supported 0,1,2,3,F)
Function group 3 (Driver Strength) 0 (supported 0,1,2,3,F)
Function group 2 (Command System) 0 (supported 0,E,F)
Function group 1 (Access Mode) 2 (supported 0,1,2,3,4,F)
r:43MB/s w:39MB/s W:41MB/s R:43MB/s ::) [best 42MB/s]
SDR50 @ 96MHz : sd_set_function =>
00C8 8001 8001 800F 800F C001 801F 0000
8001 800F 800F C001 801F 0000 0200 0000
800F C001 801F 0000 0200 0000 0000 0000
801F 0000 0200 0000 0000 0000 0000 0000
Switch Function Status version 0
Max current: 200 mA
Function group 6 (Reserved) 0 (supported 0,F)
Function group 5 (Reserved) 0 (supported 0,F)
Function group 4 (Power Limit) 0 (supported 0,1,2,3,F)
Function group 3 (Driver Strength) 0 (supported 0,1,2,3,F)
Function group 2 (Command System) 0 (supported 0,E,F)
Function group 1 (Access Mode) 2 (supported 0,1,2,3,4,F)
r:43MB/s w:41MB/s W:41MB/s R:43MB/s ::) [best 42MB/s]
Best: sd_set_function =>
00C8 8001 8001 800F 800F C001 801F 0000
8001 800F 800F C001 801F 0000 0200 0000
800F C001 801F 0000 0200 0000 0000 0000
801F 0000 0200 0000 0000 0000 0000 0000
Switch Function Status version 0
Max current: 200 mA
Function group 6 (Reserved) 0 (supported 0,F)
Function group 5 (Reserved) 0 (supported 0,F)
Function group 4 (Power Limit) 0 (supported 0,1,2,3,F)
Function group 3 (Driver Strength) 0 (supported 0,1,2,3,F)
Function group 2 (Command System) 0 (supported 0,E,F)
Function group 1 (Access Mode) 2 (supported 0,1,2,3,4,F)
r:43MB/s w:40MB/s W:41MB/s R:43MB/s ::) [best 42MB/s]
Best: sd_set_function =>
00C8 8001 8001 800F 800F C001 801F 0000
8001 800F 800F C001 801F 0000 0200 0000
800F C001 801F 0000 0200 0000 0000 0000
801F 0000 0200 0000 0000 0000 0000 0000
Switch Function Status version 0
Max current: 200 mA
Function group 6 (Reserved) 0 (supported 0,F)
Function group 5 (Reserved) 0 (supported 0,F)
Function group 4 (Power Limit) 0 (supported 0,1,2,3,F)
Function group 3 (Driver Strength) 0 (supported 0,1,2,3,F)
Function group 2 (Command System) 0 (supported 0,E,F)
Function group 1 (Access Mode) 2 (supported 0,1,2,3,4,F)
r:43MB/s w:40MB/s W:41MB/s R:43MB/s ::) [best 42MB/s]
Done.
Please run THOROUGH tests before using!!!===================
2018/04/07 18:26:14
===================
Before the hack: r:43MB/s w:41MB/s W:39MB/s R:44MB/s 8) [best 41MB/s]
SDR50 @ 96MHz : sd_check_function =>
00C8 8001 8001 8003 8001 C001 8017 0000
8001 8003 8001 C001 8017 0000 0100 0000
8001 C001 8017 0000 0100 0000 0000 0000
8017 0000 0100 0000 0000 0000 0000 0000
Switch Function Status version 0
Max current: 200 mA
Function group 6 (Reserved) 0 (supported 0,F)
Function group 5 (Reserved) 0 (supported 0,F)
Function group 4 (Power Limit) 0 (supported 0,1,F)
Function group 3 (Driver Strength) 0 (supported 0,F)
Function group 2 (Command System) 0 (supported 0,E,F)
Function group 1 (Access Mode) 1 (supported 0,1,2,4,F)
sd_set_function =>
00C8 8001 8001 8003 8001 C001 8017 0000
8001 8003 8001 C001 8017 0000 0200 0000
8001 C001 8017 0000 0200 0000 0000 0000
8017 0000 0200 0000 0000 0000 0000 0000
Switch Function Status version 0
Max current: 200 mA
Function group 6 (Reserved) 0 (supported 0,F)
Function group 5 (Reserved) 0 (supported 0,F)
Function group 4 (Power Limit) 0 (supported 0,1,F)
Function group 3 (Driver Strength) 0 (supported 0,F)
Function group 2 (Command System) 0 (supported 0,E,F)
Function group 1 (Access Mode) 2 (supported 0,1,2,4,F)
r:42MB/s w:41MB/s W:40MB/s R:43MB/s ::) [best 41MB/s]
SDR50 @ 96MHz : sd_set_function =>
00C8 8001 8001 8003 8001 C001 8017 0000
8001 8003 8001 C001 8017 0000 0200 0000
8001 C001 8017 0000 0200 0000 0000 0000
8017 0000 0200 0000 0000 0000 0000 0000
Switch Function Status version 0
Max current: 200 mA
Function group 6 (Reserved) 0 (supported 0,F)
Function group 5 (Reserved) 0 (supported 0,F)
Function group 4 (Power Limit) 0 (supported 0,1,F)
Function group 3 (Driver Strength) 0 (supported 0,F)
Function group 2 (Command System) 0 (supported 0,E,F)
Function group 1 (Access Mode) 2 (supported 0,1,2,4,F)
r:43MB/s w:41MB/s W:40MB/s R:43MB/s ::) [best 41MB/s]
Best: sd_set_function =>
00C8 8001 8001 8003 8001 C001 8017 0000
8001 8003 8001 C001 8017 0000 0200 0000
8001 C001 8017 0000 0200 0000 0000 0000
8017 0000 0200 0000 0000 0000 0000 0000
Switch Function Status version 0
Max current: 200 mA
Function group 6 (Reserved) 0 (supported 0,F)
Function group 5 (Reserved) 0 (supported 0,F)
Function group 4 (Power Limit) 0 (supported 0,1,F)
Function group 3 (Driver Strength) 0 (supported 0,F)
Function group 2 (Command System) 0 (supported 0,E,F)
Function group 1 (Access Mode) 2 (supported 0,1,2,4,F)
r:43MB/s w:41MB/s W:40MB/s R:43MB/s :) [best 41MB/s]
Best: sd_set_function =>
00C8 8001 8001 8003 8001 C001 8017 0000
8001 8003 8001 C001 8017 0000 0200 0000
8001 C001 8017 0000 0200 0000 0000 0000
8017 0000 0200 0000 0000 0000 0000 0000
Switch Function Status version 0
Max current: 200 mA
Function group 6 (Reserved) 0 (supported 0,F)
Function group 5 (Reserved) 0 (supported 0,F)
Function group 4 (Power Limit) 0 (supported 0,1,F)
Function group 3 (Driver Strength) 0 (supported 0,F)
Function group 2 (Command System) 0 (supported 0,E,F)
Function group 1 (Access Mode) 2 (supported 0,1,2,4,F)
r:43MB/s w:41MB/s W:40MB/s R:43MB/s :) [best 41MB/s]
Done.
Please run THOROUGH tests before using!!!
Will it be possible to overclock the "CF" interface...?I had same question ☺
...what about brute force search registers for CompactFlash? ;)
2.193.870 CSMgrTask:ff6aa2f8:22:05: [ID:Firmware Revision] = 20121203
2.193.882 CSMgrTask:ff6aa30c:22:05: [ID:Model Number] = SILICONMOTION SM2236AC
2.193.904 CSMgrTask:ff6aa3b4:22:05: IDE = 4, PCMCIA = 80, UDMA = 7
2.193.927 CSMgrTask:ff6aa58c:22:05: 48-bit LBA:0x00000000_03ba3e70
2.193.953 CSMgrTask:ff6aa604:22:03: Cyl=62041, Hds=16, Trk=63, nSec=62537328
0.592.929 CSMgrTask:ff6aa2f8:22:05: [ID:Firmware Revision] =
0.592.940 CSMgrTask:ff6aa30c:22:05: [ID:Model Number] = SM2236-AB
0.592.962 CSMgrTask:ff6aa3b4:22:05: IDE = 4, PCMCIA = 0, UDMA = 0
0.592.989 CSMgrTask:ff6aa604:22:03: Cyl=65, Hds=16, Trk=63, nSec=65520
If the software reports that the card is less than 64MB (not GB) then the card is corrupted and is unrecoverable using card reader.
However, while running some low-level benchmarks (without overclocking), my CF card stopped working
Will it be possible to overclock the "CF" interface as well so we can get higher rez ......Don't think so , I had a look at 5D2 log for CF action and notice it auto detect the UDMA mode , in my case UDMA 6
825FE> CSMgrTask:00095f98:00:00: *** register_interrupt("CFDriver", 0x82, 0xffb8b8cc, 0x0), from ffb8bb58
.............
834A0> CSMgrTask:ffb8a92c:22:05: [ID:Model Number] = LEXAR ATA FLASH CARD
834C8> CSMgrTask:ffb8aabc:22:05: IDE = 4, PCMCIA = 80, UDMA = 6
.............
83572> CSMgrTask:ffbdb8a0:22:01: cfDecideTiming: UDMA Mode 6 (CFA4.0)
.............
83592> CSMgrTask:ffbdbb3c:22:03: CF_GetAccessTiming : DatTim = 3, DatMod = 6
can we fool the controller to switch to UDMA7 on D4 camera CF cards?Just a FYI tl:dr. Dont set Canon Menu to record to CF+SD combined with ML Menu Spanned Recording ON, this will ruin your CF card.
@reddeercity: more details after I'll get a new card (it *is* possible to overclock the 5D2 CF interface).:o Really , cool that's better then trying to change to udma 7
"<K218 Board> SystemCLK 132MHz":
looks to be part of the system check before boot loader .*"cfGetRegisterTiming: I/O 250nS (PIO Mode4)"so "Mode4" =250nS I/O there was also a *"cfGetRegisterTiming: I/O 120nS"but not "Mode"good luck configuring Canon controller to use that. Brute-forcing the "known" registers didn't help.
You can send ATA commands to the CF card (QEMU emulates them), so if the only difference between UDMA 6 and 7 is timing, it might even be possible to put the card in UDMA7.Ok , yet another reason to get QEMU going
===================
2018/04/06 22:29:28
===================
Before the hack: r:37MB/s w:34MB/s W:32MB/s R:37MB/s :) [best 34MB/s]
SDR50 @ 96MHz : r:37MB/s w:32MB/s W:33MB/s R:37MB/s meh [best 34MB/s]
SDR50 @ 96MHz : r:37MB/s w:19MB/s W:33MB/s R:38MB/s meh [best 34MB/s]
SDR50 @ 80MHz : r:32MB/s w:30MB/s W:28MB/s R:32MB/s meh [best 34MB/s]
SDR50 @ 80MHz : r:36MB/s w:34MB/s W:35MB/s R:37MB/s :) [best 34MB/s]
SDR50 @ 120MHz : r:54MB/s w:52MB/s W:52MB/s R:55MB/s :) [best 52MB/s]
SDR50 @ 120MHz : r:54MB/s w:50MB/s W:52MB/s R:55MB/s meh [best 52MB/s]
SDR104 @ 96MHz : r:44MB/s w:42MB/s W:42MB/s R:44MB/s meh [best 52MB/s]
SDR104 @ 96MHz : r:44MB/s w:41MB/s W:42MB/s R:44MB/s meh [best 52MB/s]
SDR104 @ 80MHz : r:37MB/s w:35MB/s W:36MB/s R:37MB/s meh [best 52MB/s]
SDR104 @ 80MHz : r:37MB/s w:35MB/s W:35MB/s R:37MB/s meh [best 52MB/s]
SDR104 @ 120MHz: r:55MB/s w:53MB/s W:52MB/s R:55MB/s :) [best 53MB/s]
SDR104 @ 120MHz: r:54MB/s w:51MB/s W:50MB/s R:55MB/s meh [best 53MB/s]
SDR104 @ 132MHz: r:51MB/s w:48MB/s W:48MB/s R:51MB/s meh [best 53MB/s]
SDR104 @ 132MHz: r:50MB/s w:48MB/s W:48MB/s R:51MB/s meh [best 53MB/s]
SDR104 @ 160MHz: r:72MB/s w:70MB/s W:67MB/s R:73MB/s :) [best 70MB/s]
SDR104 @ 160MHz: r:72MB/s w:68MB/s W:64MB/s R:73MB/s meh [best 70MB/s]
Done.
Please run THOROUGH tests before using!!!Then I could record videos with high bitrate. Once i switched camera off and on again memory patch wasn't (obviously) applied, so i tried to enable SD hack again, but i've got this:===================
2018/04/10 08:29:10
===================
Before the hack: malloc error
[best 66MB/s]
SDR50 @ 96MHz : malloc error
[best 66MB/s]
SDR50 @ 96MHz : malloc error
[best 66MB/s]
SDR50 @ 80MHz : malloc error
[best 66MB/s]
SDR50 @ 80MHz : malloc error
[best 66MB/s]
SDR50 @ 120MHz : malloc error
[best 66MB/s]
SDR50 @ 120MHz : malloc error
[best 66MB/s]
SDR104 @ 96MHz : malloc error
[best 66MB/s]
SDR104 @ 96MHz : malloc error
[best 66MB/s]
SDR104 @ 80MHz : malloc error
[best 66MB/s]
SDR104 @ 80MHz : malloc error
[best 66MB/s]
SDR104 @ 120MHz: malloc error
[best 66MB/s]
SDR104 @ 120MHz: malloc error
[best 66MB/s]
SDR104 @ 132MHz: malloc error
[best 66MB/s]
SDR104 @ 132MHz: malloc error
[best 66MB/s]
SDR104 @ 160MHz: malloc error
[best 66MB/s]
SDR104 @ 160MHz: malloc error
[best 66MB/s]
Done.
Please run THOROUGH tests before using!!!Strangely enough, after this memory patch have been applied and i could continue recording with high bitrate.
Then I could record videos with high bitrate. Once i switched camera off and on again memory patch wasn't (obviously) applied, so i tried to enable SD hack again, but i've got this:Code: [Select]===================Strangely enough, after this memory patch have been applied and i could continue recording with high bitrate.
2018/04/10 08:29:10
===================
Before the hack: malloc error
[best 66MB/s]
SDR50 @ 96MHz : malloc error
[best 66MB/s]
SDR50 @ 96MHz : malloc error
[best 66MB/s]
SDR50 @ 80MHz : malloc error
[best 66MB/s]
SDR50 @ 80MHz : malloc error
[best 66MB/s]
SDR50 @ 120MHz : malloc error
[best 66MB/s]
SDR50 @ 120MHz : malloc error
[best 66MB/s]
SDR104 @ 96MHz : malloc error
[best 66MB/s]
SDR104 @ 96MHz : malloc error
[best 66MB/s]
SDR104 @ 80MHz : malloc error
[best 66MB/s]
SDR104 @ 80MHz : malloc error
[best 66MB/s]
SDR104 @ 120MHz: malloc error
[best 66MB/s]
SDR104 @ 120MHz: malloc error
[best 66MB/s]
SDR104 @ 132MHz: malloc error
[best 66MB/s]
SDR104 @ 132MHz: malloc error
[best 66MB/s]
SDR104 @ 160MHz: malloc error
[best 66MB/s]
SDR104 @ 160MHz: malloc error
[best 66MB/s]
Done.
Please run THOROUGH tests before using!!!
I wanted to ask if is it possible to streamline usage of the hack (like add menu "apply saved SD clock values", or to avoid opening console), but since you retracted the module, i don't know whether you intend to explore this more. (And as far as i'm concerned i'm not giving this module back :D )
I am trying to implement sd_uhs on my 6d. using the latest nightbuild. have an error when I do it. can anyone assist me.
Thanks @Levas -- here are your changes compared to the latest @a1ex commit (https://bitbucket.org/daniel_fort/magic-lantern/commits/979c1fc3c37ac8913d8f6ca605889734bf100a67). I branched off of the latest in order to include all the Digic 5 cameras and to see if maybe some of the latest changes should be put back in.
@Danne -- I think this might be the version you were looking for.
if (is_camera("EOSM", "2.0.2"))
{
sd_setup_mode = 0xFF338D40;
sd_setup_mode_in = 0xFF338DC8;
sd_setup_mode_reg = 1;
sd_set_function = 0xFF63EF60;
SD_ReConfiguration = (void *) 0xFF641314;
}
if (is_camera("100D", "1.0.1"))
{
sd_setup_mode = 0xFF3355B0;
sd_setup_mode_in = 0xFF335648;
sd_setup_mode_reg = 1;
sd_set_function = 0xFF6530A4;
SD_ReConfiguration = (void *) 0xFF655458;
}Latest code seems more dependent on test runs so I can´t really say why Levas "test bypass" seems to work but it does, at least on my eos 100D.
This stuff is too good not to be used, thanks Alex :D
I deleted one line with 'show console' and I deleted a bunch off the lines where most of the settings are tested.
I only kept the highest 160Mhz setting in it.
However I did not quite catch how to enable the overclock for the actuall recording
If we want to go further, in the "crop_rec on steroids" thread, @theBilalFakhouri spoke about bypassing the resolution limitation in the 5x zoom mode. See here: https://www.magiclantern.fm/forum/index.php?topic=19300.msg197870#msg197870
Now with SD interface overclocking, reaching those higher resolutions seems more feasible? It would be nice to be able to shoot closer to 16:9 in 2.5k. He was testing on a 700D and one of the resolutions he was able to get working was 2520x1386 at 23.976fps, which sounds incredible.
@alpicat
Did you try any changes with adtg module to increase resolution? Big post and sure would take some time and fiddling to get it right.
I have a question for you. You mentioned the speed booster for increased view angle with EF-S lenses on APSC-sensor based mirrorless. Would it be possible to use such speed boosters for the same purpose but with 1,6x crop sensor DSLRs operating in the LifeView (video recording) mode, with full-frame lenses, of course? If not, why not? And if yes, are such speed boosters available? Sorry for the stupid question but I have never used and even seen a speed booster sofar.
It'll turn the EOS M into a full frame camera.
Well, my question was actually about APSC-sensor based DSLRs. Can a speed booster turn them into full-frame cameras when operating in Life View with full-frame lenses? Do such speed boosters exist and if yes, does anyone on this forum have any experience with them?
Hello, does anyone have a Samsung Evo Plus microSD card and did or could do the benchmarking? It seems to be a promising alternative. Generally it is also able to achieve approx. 90MB/s bulk write speeds but at much lower cost than SanDisk Extreme Pro. As an example: 128GB Samsung Evo Plus is at Amazon equally priced to 64GB SanDisk Extreme Pro (39€ vs. 38,99€). Both are sold by Amazon, so the risk of counterfeit should be equally low.Samsung PRO 32GB here. 41MB/s default with 6D. 65MB/s overclocked.
Funnily, according to some sources (https://www.allesbeste.de/test/die-beste-micro-sd-karte/), the transfer drops by roughly a half when using the provided MicroSD -> SD adapter. If another adapter can overcome this bottleneck and if similarly high speeds can be achieved with an EOS camera it for me unknown so far. It will decide if it's really an alternative. If yes, it would be a bargain.
Hello, does anyone have a Samsung Evo Plus microSD card and did or could do the benchmarking? It seems to be a promising alternative. Generally it is also able to achieve approx. 90MB/s bulk write speeds but at much lower cost than SanDisk Extreme Pro. As an example: 128GB Samsung Evo Plus is at Amazon equally priced to 64GB SanDisk Extreme Pro (39€ vs. 38,99€). Both are sold by Amazon, so the risk of counterfeit should be equally low.
Funnily, according to some sources (https://www.allesbeste.de/test/die-beste-micro-sd-karte/), the transfer drops by roughly a half when using the provided MicroSD -> SD adapter. If another adapter can overcome this bottleneck and if similarly high speeds can be achieved with an EOS camera it for me unknown so far. It will decide if it's really an alternative. If yes, it would be a bargain.
@kye:
First question is if there is a penalty involved using SD-card adapters. If you own a decent cardreader you can run Crystaldiskmark (Windows) or Blackmagic Disk Speed Test (MacOS, OS X) to find out.
Don't forget sd_uhs.mo is able to kill memory cards.
===================
Before the hack: r:27MB/s w:31MB/s W:27MB/s R:38MB/s 8) [best 31MB/s]
SDR50 @ 96MHz : r:38MB/s w:33MB/s W:31MB/s R:38MB/s :) [best 33MB/s]
SDR50 @ 96MHz : r:38MB/s w:33MB/s W:31MB/s R:37MB/s ::) [best 33MB/s]
SDR50 @ 80MHz : r:33MB/s w:29MB/s W:29MB/s R:32MB/s meh [best 33MB/s]
SDR50 @ 80MHz : r:33MB/s w:29MB/s W:29MB/s R:32MB/s meh [best 33MB/s]
SDR50 @ 120MHz : r:42MB/s w:32MB/s W:32MB/s R:45MB/s ::) [best 33MB/s]
SDR50 @ 120MHz : r:42MB/s w:32MB/s W:32MB/s R:45MB/s ::) [best 33MB/s]
SDR104 @ 96MHz : D0 D0 r:37MB/s w:33MB/s W:31MB/s R:37MB/s :) [best 33MB/s]
SDR104 @ 96MHz : D1 D1 r:38MB/s w:33MB/s W:31MB/s R:37MB/s ::) [best 33MB/s]
SDR104 @ 80MHz : D0 D0 r:32MB/s w:29MB/s W:29MB/s R:32MB/s meh [best 33MB/s]
SDR104 @ 80MHz : D1 D1 r:32MB/s w:30MB/s W:29MB/s R:26MB/s meh [best 33MB/s]
SDR104 @ 120MHz: D0 D0 r:42MB/s w:32MB/s W:33MB/s R:45MB/s ::) [best 33MB/s]
SDR104 @ 120MHz: D1 D1 r:41MB/s w:32MB/s W:32MB/s R:45MB/s ::) [best 33MB/s]
SDR104 @ 132MHz: D0 D0 r:40MB/s w:32MB/s W:32MB/s R:43MB/s ::) [best 33MB/s]
SDR104 @ 132MHz: D1 D1 r:40MB/s w:32MB/s W:32MB/s R:42MB/s ::) [best 33MB/s]
SDR104 @ 160MHz: D0 D0 r:56MB/s w:36MB/s W:47MB/s R:42MB/s :) [best 36MB/s]
SDR104 @ 160MHz: D1 D1 r:42MB/s w:47MB/s W:46MB/s R:42MB/s 8) [best 47MB/s]
SDR104 @ 160MHz: D2 D2 r:55MB/s w:37MB/s W:47MB/s R:41MB/s meh [best 47MB/s]
SDR104 @ 160MHz: D3 D3 r:56MB/s w:46MB/s W:47MB/s R:41MB/s ::) [best 47MB/s]
SDR104 @ 160MHz: D0 D0 r:43MB/s w:46MB/s W:47MB/s R:42MB/s ::) [best 47MB/s]
SDR104 @ 160MHz: D1 D1 r:46MB/s w:46MB/s W:47MB/s R:42MB/s ::) [best 47MB/s]
SDR104 @ 160MHz: D2 D2 r:44MB/s w:46MB/s W:47MB/s R:42MB/s ::) [best 47MB/s]
SDR104 @ 160MHz: D3 D3 r:45MB/s w:47MB/s W:46MB/s R:40MB/s ::) [best 47MB/s]
SDR104 @ 160MHz: D0 D0 r:41MB/s w:48MB/s W:47MB/s R:42MB/s :) [best 48MB/s]
SDR104 @ 160MHz: D1 D1 r:42MB/s w:45MB/s W:47MB/s R:42MB/s ::) [best 48MB/s]
SDR104 @ 160MHz: D2 D2 r:56MB/s w:47MB/s W:47MB/s R:42MB/s ::) [best 48MB/s]
SDR104 @ 160MHz: D3 D3 r:42MB/s w:46MB/s W:47MB/s R:43MB/s ::) [best 48MB/s]
SDR104 @ 160MHz: D0 D0 r:42MB/s w:47MB/s W:47MB/s R:41MB/s ::) [best 48MB/s]
SDR104 @ 160MHz: D1 D1 r:42MB/s w:48MB/s W:45MB/s R:41MB/s ::) [best 48MB/s]
SDR104 @ 160MHz: D2 D2 r:43MB/s w:47MB/s W:46MB/s R:41MB/s ::) [best 48MB/s]
SDR104 @ 160MHz: D3 D3 r:43MB/s w:46MB/s W:46MB/s R:42MB/s ::) [best 48MB/s]
Best: D0 D0 r:42MB/s w:46MB/s W:47MB/s R:40MB/s ::) [best 48MB/s]
Best: D0 D0 r:42MB/s w:45MB/s W:47MB/s R:40MB/s ::) [best 48MB/s]
Done.
Please run THOROUGH tests before using!!!
Before the hack: r:38MB/s w:35MB/s W:32MB/s R:38MB/s 8) [best 35MB/s]
SDR50 @ 96MHz : r:38MB/s w:34MB/s W:34MB/s R:38MB/s ::) [best 35MB/s]
SDR50 @ 96MHz : r:38MB/s w:34MB/s W:33MB/s R:38MB/s ::) [best 35MB/s]
SDR50 @ 80MHz : r:33MB/s w:29MB/s W:29MB/s R:33MB/s meh [best 35MB/s]
SDR50 @ 80MHz : r:32MB/s w:30MB/s W:30MB/s R:32MB/s meh [best 35MB/s]
SDR50 @ 120MHz : r:45MB/s w:40MB/s W:39MB/s R:46MB/s 8) [best 40MB/s]
SDR50 @ 120MHz : r:45MB/s w:38MB/s W:39MB/s R:43MB/s ::) [best 40MB/s]
SDR104 @ 96MHz : D0 D0 r:38MB/s w:33MB/s W:34MB/s R:35MB/s meh [best 40MB/s]
SDR104 @ 96MHz : D1 D1 r:37MB/s w:34MB/s W:34MB/s R:37MB/s meh [best 40MB/s]
SDR104 @ 80MHz : D0 D0 r:33MB/s w:30MB/s W:29MB/s R:32MB/s meh [best 40MB/s]
SDR104 @ 80MHz : D1 D1 r:32MB/s w:30MB/s W:30MB/s R:32MB/s meh [best 40MB/s]
SDR104 @ 120MHz: D0 D0 r:46MB/s w:40MB/s W:38MB/s R:42MB/s ::) [best 40MB/s]
SDR104 @ 120MHz: D1 D1 r:46MB/s w:36MB/s W:40MB/s R:41MB/s meh [best 40MB/s]
SDR104 @ 132MHz: D0 D0 r:43MB/s w:38MB/s W:36MB/s R:42MB/s ::) [best 40MB/s]
SDR104 @ 132MHz: D1 D1 r:43MB/s w:33MB/s W:33MB/s R:43MB/s meh [best 40MB/s]
SDR104 @ 160MHz: D0 D0 r:58MB/s w:45MB/s W:45MB/s R:55MB/s 8) [best 45MB/s]
SDR104 @ 160MHz: D1 D1 r:55MB/s w:47MB/s W:47MB/s R:57MB/s :) [best 47MB/s]
SDR104 @ 160MHz: D2 D2 r:57MB/s w:47MB/s W:47MB/s R:57MB/s :) [best 47MB/s]
SDR104 @ 160MHz: D3 D3 r:53MB/s w:47MB/s W:47MB/s R:57MB/s ::) [best 47MB/s]
SDR104 @ 160MHz: D0 D0 r:58MB/s w:47MB/s W:47MB/s R:57MB/s :) [best 47MB/s]
SDR104 @ 160MHz: D1 D1 r:56MB/s w:47MB/s W:47MB/s R:58MB/s :) [best 47MB/s]
SDR104 @ 160MHz: D2 D2 r:57MB/s w:46MB/s W:46MB/s R:54MB/s ::) [best 47MB/s]
SDR104 @ 160MHz: D3 D3 r:57MB/s w:45MB/s W:46MB/s R:54MB/s ::) [best 47MB/s]
SDR104 @ 160MHz: D0 D0 r:55MB/s w:47MB/s W:47MB/s R:57MB/s ::) [best 47MB/s]
SDR104 @ 160MHz: D1 D1 r:56MB/s w:44MB/s W:43MB/s R:55MB/s ::) [best 47MB/s]
SDR104 @ 160MHz: D2 D2 r:57MB/s w:42MB/s W:46MB/s R:54MB/s meh [best 47MB/s]
SDR104 @ 160MHz: D3 D3 r:58MB/s w:47MB/s W:47MB/s R:56MB/s ::) [best 47MB/s]
SDR104 @ 160MHz: D0 D0 r:56MB/s w:44MB/s W:43MB/s R:57MB/s ::) [best 47MB/s]
SDR104 @ 160MHz: D1 D1 r:54MB/s w:48MB/s W:46MB/s R:45MB/s :) [best 48MB/s]
SDR104 @ 160MHz: D2 D2 r:55MB/s w:45MB/s W:38MB/s R:55MB/s ::) [best 48MB/s]
SDR104 @ 160MHz: D3 D3 r:56MB/s w:47MB/s W:46MB/s R:55MB/s ::) [best 48MB/s]
Best: D1 D1 r:55MB/s w:47MB/s W:46MB/s R:58MB/s ::) [best 48MB/s]
Best: D1 D1 r:57MB/s w:43MB/s W:47MB/s R:46MB/s meh [best 48MB/s]
I have put up a hardcoded 160MHZ 700D build in my repository to be tested. It´s the same as for 100D and eosm. If anybody tests this, please feedback here what´s working or not. Fried cards or not etc...
On top of downloads page:
https://bitbucket.org/Dannephoto/magic-lantern/downloads/
Samsung PRO 32GB here. 41MB/s default with 6D. 65MB/s overclocked.
Ok, figured it out!
BM Disk Speed test in Transcend SD card reader:
Samsung EVO Plus with no adapter (directly in microSD slot in card reader) ~83MB/s
Samsung EVO Plus with Red Sandisk adapter ~83MB/s
Samsung EVO Plus with Black Sandisk adapter (from Sandisk Ultra card) ~83MB/s
Samsung EVO Plus with Black Kingston adapter ~83MB/s
Looks like no differences between those adapters anyway.
Log from sd_uhs.mo in 700D:Sapporo, kye, thank you very much for sharing your results! So there is no problem with adapters, Samsung Evo Plus is a decent card but only twice more expensive Samsung Pro is on par with SanDisk Extreme Pro when using with 700D. Good to know!
Before the hack: r:27MB/s w:31MB/s W:27MB/s R:38MB/s 8) [best 31MB/s]
(...)
SDR104 @ 160MHz: D1 D1 r:42MB/s w:47MB/s W:46MB/s R:42MB/s 8) [best 47MB/s]
Well, my question was actually about APSC-sensor based DSLRs. Can a speed booster turn them into full-frame cameras when operating in Life View with full-frame lenses? Do such speed boosters exist and if yes, does anyone on this forum have any experience with them?
I have put up a hardcoded 160MHZ 700D build in my repository to be tested. It´s the same as for 100D and eosm. If anybody tests this, please feedback here what´s working or not. Fried cards or not etc...
On top of downloads page:
https://bitbucket.org/Dannephoto/magic-lantern/downloads/
Any chance you could do the same for 70D? (combine dfort's crop_rec_4k.57614b3.2018Mar14.70D112.zip and your 160MHZ hardcode)
-- enable SD overclocking
if menu.get("Debug", "SD overclock", "OFF")
then
console.show()
print("This will enable SD overclock")
msleep(2000)
menu.set("Debug", "SD overclock", "ON")
else
console.show()
print("Please enable sd_uhs.mo before running this script again.")
msleep(5000)
console.hide()
return
enddfort's crop-rec doesnt work yet
Since hardcoding sd_uhs.mo seems a bit far off here is a lua snippet which will start the SD overclock patching upon starting the camera. Lua module has to be enabled and the script needs to be set to Autorun to ON.
Put following in a file with the extension .lua and put it in the scripts folder.Code: [Select]-- enable SD overclocking
if menu.get("Debug", "SD overclock", "OFF")
then
console.hide()
menu.set("Debug", "SD overclock", "ON")
else
console.show()
print("Please enable sd_uhs.mo before running this script again.")
msleep(5000)
console.hide()
return
end
-- enable SD overclocking
if menu.get("Debug", "SD overclock", "OFF")
then
console.show()
print("This will enable SD overclock")
msleep(2000)
menu.set("Debug", "SD overclock", "ON")
else
console.show()
print("Please enable sd_uhs.mo before running this script again.")
msleep(5000)
console.hide()
return
endWorking fine for me on 70D so far
@Danne Could you make me a build for 700D? I want to test it. Thank you.
Changed name to SDOclock.lua & now it shows up ~
I'm wondering if we still need to run the benchmark test every time the camera is turned on or is this not necessary?
This was never necessary, but the quick tests performed during patching are not sufficient to make sure the preset is reliable.
Besides this, you have to make sure there will be absolutely no other card access during the initial tests. The code is not thread safe and any kind of card access during the inital tests, from either Canon firmware or ML, will lock up the camera and may result in a corrupted filesystem. Should this happen (camera locking up), you must format the card (even if it appears to work fine at first sight, it's almost certainly not OK and some of your files are probably already lost at that point).
I'm not saying this just for kicks; I've actually experienced corrupted filesystems many times while testing this module. If in doubt, please review the code before running it, and make sure you are not using it for anything important. Not joking. There is a reason why this is not available as a regular download.
P.S. more stuff coming soon (in particular, better compatibility with certain Sandisk cards). Still experimenting. No success with thread safety yet.
P.P.S. Not all 95MB/s cards are compatible with the hardcoded 160MHz preset. I've just got two of these.
make sure there will be absolutely no other card access during the initial tests.
P.S. more stuff coming soon (in particular, better compatibility with certain Sandisk cards). Still experimenting. No success with thread safety yet.
@Danne...I initially had the same issue as @OlRivRat where I had to change the name of the lua file to get it to appear in the scripts menu, but that was easy to fix.
Besides this, you have to make sure there will be absolutely no other card access during the initial tests. The code is not thread safe and any kind of card access during the inital tests, from either Canon firmware or ML, will lock up the camera and may result in a corrupted filesystem. Should this happen (camera locking up), you must format the card (even if it appears to work fine at first sight, it's almost certainly not OK and some of your files are probably already lost at that point).
-- enable SD overclocking
console.hide()
if menu.get("Debug", "SD overclock", "MAY CAUSE DATA LOSS") == "MAY CAUSE DATA LOSS"
then
if menu.get("Movie", "RAW video", "") == "OFF"
then
display.notify_box("enabling of SD overclocking")
menu.set("Debug", "SD overclock", "ON")
msleep(1000)
display.notify_box("please wait...")
msleep(2000)
display.notify_box("patching...")
msleep(2000)
display.notify_box("done!")
else
menu.set("Movie", "RAW video", "OFF")
display.notify_box("enabling of SD overclocking")
menu.set("Debug", "SD overclock", "ON")
msleep(1000)
display.notify_box("please wait...")
msleep(2000)
display.notify_box("patching...")
msleep(3000)
menu.set("Movie", "RAW video", "ON")
display.notify_box("done!")
end
else
display.notify_box("Please enable sd_uhs.mo")
msleep(2000)
display.notify_box("Please enable sd_uhs.mo")
msleep(2000)
return
endif menu.get("Movie", "RAW video", "") == "ON" will not work since it also needs what else is written after ON:if menu.get("Movie", "RAW video", "") == "ON, 1736x584" will work. Is there some other way to check for when a menu item is on or not? while camera.mode ~= MODE.MOVIE do
display.notify_box("enable MOVIE mode")
msleep(1000)
end
menu.set("Movie", "RAW video", "ON")
camera.shutter.value = 1/50
camera.iso.value=400
-- ready to enter x5 crop mode
lv.zoom = 5
-- fixme: doesn't seem to work if you have fine-tuned it
menu.set("RAW video", "Resolution", 2560)
menu.set("Overlay", "Global Draw", "OFF")
menu.set("Display", "Clear overlays", "OFF")
menu.set("RAW video", "Data format", "12-bit lossless")menu.set("FPS override", "Desired FPS", "24.002")Will set 16.003 fps on my cam. Maybe it´s something in cam not updating correctly when going through lua. Needs some more understanding.If you want to check 8bit output you can actually do that directly with mlv_dump(on steroids) since buncyball got that feature working a while ago with -b option. So just pass a 14bit file and select -b 8 and you´ll see how shitty it looks ;).
Ran a brute force (random) search for the above registers, and...
SDR104 @ 160MHz 8)Code: [Select]static uint32_t uhs_regs[] = { 0xC0400600, 0xC0400604,/*C0400608, C040060C*/0xC0400610, 0xC0400614, 0xC0400618, 0xC0400624, 0xC0400628, 0xC040061C, 0xC0400620 }; /* register addresses */
static uint32_t sdr50_700D[] = { 0x3, 0x3, 0x4, 0x1D000301, 0x0, 0x201, 0x201, 0x100, 0x4 }; /* SDR50 values from 700D (96MHz) */
static uint32_t sdr_80MHz[] = { 0x3, 0x3, 0x5, 0x1D000401, 0x0, 0x201, 0x201, 0x100, 0x5 }; /* underclocked values: 80MHz = 96*(4+1)/(5+1) */
static uint32_t sdr_120MHz[] = { 0x3, 0x3, 0x3, 0x1D000201, 0x0, 0x201, 0x201, 0x100, 0x3 }; /* overclocked values: 120MHz = 96*(4+1)/(3+1) */
static uint32_t sdr_132MHz[] = { 0x2, 0x2, 0x2, 0x1D000201, 0x0, 0x100, 0x100, 0x100, 0x2 }; /* overclocked values: 132MHz?! (found by brute-forcing) */
static uint32_t sdr_160MHz[] = { 0x2, 0x3, 0x1, 0x1D000001, 0x0, 0x100, 0x100, 0x100, 0x1 }; /* overclocked values: 160MHz = 96*(4+1)/(2?+1) (found by brute-forcing) */
static uint32_t sdr50_700D[] = { 0x3, 0x3, 0x4, 0x1D000301, 0x0, 0x201, 0x201, 0x100, 0x4, 0 }; /* SDR50 values from 700D (96MHz) */
static uint32_t sdr_96MHz_b[] = { 0x3, 0x3, 0x4, 0x1D000301, 0x0, 0x201, 0x201, 0x0, 0x4, 0 };
static uint32_t sdr_80MHz_a[] = { 0x3, 0x3, 0x5, 0x1D000401, 0x0, 0x201, 0x201, 0x0, 0x5, 0 }; /* underclocked values: 80MHz = 96*(4+1)/(5+1) */
static uint32_t sdr_120MHz_a[] = { 0x3, 0x3, 0x3, 0x1D000201, 0x0, 0x201, 0x201, 0x100, 0x3, 0 }; /* overclocked values: 120MHz = 96*(4+1)/(3+1) */
static uint32_t sdr_120MHz_b[] = { 0x3, 0x3, 0x3, 0x1D000201, 0x0, 0x201, 0x201, 0x0, 0x3, 0 };
static uint32_t sdr_132MHz_a[] = { 0x2, 0x2, 0x2, 0x1D000201, 0x0, 0x100, 0x100, 0x100, 0x2, 0 }; /* overclocked values: 132MHz?! */
static uint32_t sdr_132MHz_b[] = { 0x5, 0x2, 0x2, 0x1D000001, 0x0, 0x201, 0x301, 0x100, 0x2, 0 }; /* overclocked values: this one works on SanDisk Extreme Pro 32GB 95MB/s V30 (5D3) */
static uint32_t sdr_132MHz_c[] = { 0x2, 0x2, 0x2, 0x1D000200, 0x1, 0x101, 0x100, 0x10100, 0x10003, 0 };
static uint32_t sdr_160MHz_a[] = { 0x2, 0x3, 0x1, 0x1D000001, 0x0, 0x100, 0x100, 0x100, 0x1, 0 }; /* overclocked values: 160MHz = 96*(4+1)/(2?+1) (found by brute-forcing) */
static uint32_t sdr_160MHz_b[] = { 0x3, 0x3, 0x2, 0x1D000200, 0x1, 0x301, 0x100, 0x10100, 0x10003, 0 };
static uint32_t sdr_160MHz_c[] = { 0x3, 0x3, 0x2, 0x1D000200, 0x1, 0x301, 0x100, 0x10000, 0x10003, 0 };
static uint32_t sdr_160MHz_d[] = { 0x3, 0x3, 0x2, 0x1D000200, 0x1, 0x301, 0x100, 0x0, 0x10003, 0 };
Had anyone tried the hack with this one??UHS-II, SanDisk and Canon? Slow combination.
(https://www.magiclantern.fm/forum/proxy.php?request=https%3A%2F%2Fthumb.ibb.co%2Fmqy5ho%2Fmemoria_sandisk_32gb_extreme_pro_sdhc_uhs_ii.jpg&hash=666aae90d49c9791e2dd13be3a82b98b) (https://ibb.co/mqy5ho)
@SapporoCheck yourself http://www.cameramemoryspeed.com/canon-7d-mark-ii/fastest-sd-cf-card-comparison/
Why is that?
@OlRivrRat That's a UHS-II card. Canon cameras use UHS-I, so there's no point trying an expensive UHS-II card - I'm guessing they'd end up being slower in a Canon than a fast UHS-I card. Although I don't know if anyone's tested this.
@Sapporo Wondering if there's a faster alternative to Sandisk cards, in particular to their Extreme Pro 95mb/s V30 UHS-I SD cards? I've tested two of those and the max write speed I can get on an EOS M is 55mb/s. I've seen people get faster benchmark results but unsure exactly which cards they were using.
I got 71MB/s with 6D and SanDisk Extreme Pro 95MB/s 64GB.
@Sapporo & AlpicatYou have the write speed in the link. Lexar UHS-II has not the same issue.
Can certainly understand that the UHS-II SDs are unnecessary in Our EOSs.
I was curious as to why the "Combo" of "UHS-II, SanDisk and Canon" would be thought to be "Slow".
Ok, will be supported?Guys, correct me if I am wrong, as I am mostly a reader who follows this with interest.
...So for optimizing write speeds in older models someone should start a similar investigation, if we want any progress for those.
I doubt - D4 uses only 2 bits (http://magiclantern.wikia.com/wiki/Register_Map#Timer.2FClock_Module) for clock speed (0xC0400004). Feel free to prove me wrong (possibly by brute-forcing the other bits).
1300D has a string that explains these 2 bits: SetSdClock %d ->0:210K 1:16MHz 2:24MHz 3:48MHz
I looked at the stubs for the 7D and found just one. Strange thing is that camera only has one CF slot and no SD slot yet it has "SD_ReConfiguration" -- wonder what it does?
825FE> CSMgrTask:00095f98:00:00: *** register_interrupt("CFDriver", 0x82, 0xffb8b8cc, 0x0), from ffb8bb58
834A0> CSMgrTask:ffb8a92c:22:05: [ID:Model Number] = LEXAR ATA FLASH CARD
834C8> CSMgrTask:ffb8aabc:22:05: IDE = 4, PCMCIA = 80, UDMA = 6
83572> CSMgrTask:ffbdb8a0:22:01: cfDecideTiming: UDMA Mode 6 (CFA4.0)
83592> CSMgrTask:ffbdbb3c:22:03: CF_GetAccessTiming : DatTim = 3, DatMod = 6
.... but some blocks were written at ~120MB/s, others at ~85MB/s, and a very small percentage of them were written at lower speeds.
@reddeercity: more details after I'll get a new card (it *is* possible to overclock the 5D2 CF interface).
You can send ATA commands to the CF card (QEMU emulates them), so if the only difference between UDMA 6 and 7 is timing, it might even be possible to put the card in UDMA7.How would I do this in QEMU ?
How is something like this coded , as a module or just code in ML source ?
as seen the cf card is only being access @ UDMA 6 which limit to 80MB/s thou the card is capable of UDMA 7,
CF 5D3:
0.932.277 CSMgrTask:ff6aa02c:MMIO : [0xC0628504] <- 0x04060503
0.932.285 CSMgrTask:ff6aa050:MMIO : [0xC0628508] <- 0x010A1105
0.932.291 CSMgrTask:ff6a9e4c:MMIO : [0xC062850C] <- 0x00000202
0xC0628504 0xC0628508 0xC062850C
u7: 0x04060503 0x010A1105 0x00000202
u6: 0x04060503 0x010A1105 0x00000303
u5: 0x04060503 0x010A1105 0x00000303
u4: 0x04060503 0x010A1405 0x01000505
u3: 0x04060503 0x030A1405 0x01000808
u2: 0x04060503 0x060A1405 0x01000B0B
u1: 0x04060503 0x090A1905 0x01000F0E
u0: 0x05040402 0x04060503 0x01001616
-->0x0202 and I obtain UDMA 6 speed (around 80MB/s) i suppose original value
Can you try 102 or 201?yes but nothing change.
I used DIGIC POKE to simply modify this values I found in http://magiclantern.wikia.com/wiki/Register_Map#CFDMA (http://magiclantern.wikia.com/wiki/Register_Map#CFDMA) :Does this address refers to Word 88 of CF Software Interface specifications?
0xC062850C --> 0x1213 and I obtain UDMA 0 speed (around 15MB/s)
--> ...........
--> ...........
-->0x0202 and I obtain UDMA 6 speed (around 80MB/s) i suppose original value
-->0x0101 and sadly I obtain UDMA 6 speed too :(
Code: [Select]CF 5D3:
0.932.277 CSMgrTask:ff6aa02c:MMIO : [0xC0628504] <- 0x04060503
0.932.285 CSMgrTask:ff6aa050:MMIO : [0xC0628508] <- 0x010A1105
0.932.291 CSMgrTask:ff6a9e4c:MMIO : [0xC062850C] <- 0x00000202
0xC0628504 0xC0628508 0xC062850C
u7: 0x04060503 0x010A1105 0x00000202
u6: 0x04060503 0x010A1105 0x00000303
u5: 0x04060503 0x010A1105 0x00000303
u4: 0x04060503 0x010A1405 0x01000505
u3: 0x04060503 0x030A1405 0x01000808
u2: 0x04060503 0x060A1405 0x01000B0B
u1: 0x04060503 0x090A1905 0x01000F0E
u0: 0x05040402 0x04060503 0x01001616
Can you try 102 or 201?
825FE> CSMgrTask:00095f98:00:00: *** register_interrupt("CFDriver", 0x82, 0xffb8b8cc, 0x0), from ffb8bb58
Does this initialise supported features of the reader? (Word 82 Features/command sets supported from specifications)2. Last version corrupts filesystem(record several files with one filename) when "driver strength" is changed.
FYI : 700D/1.1.5 using Danne's Sept11 build with SDoverclock slipstreamed and SD_UHS hack
For reference, I purchased a ProGrade 64GB SDXC V90 UHS-3 Card - looking to exceed the 50-60 MBps Write numbers ive seen posted recently.
Numbers are shown here in the Image. Very impressive results. I'll perform video shooting this weekend and report back my results
(https://www.magiclantern.fm/forum/proxy.php?request=https%3A%2F%2Fthumb.ibb.co%2FgJ92FL%2FPro-Grade-SDXC.jpg&hash=2e56d1cdc524eee80dfa1c0621176e11) (https://ibb.co/gJ92FL)
I fully agree with you, Alpicat. A resolution ot 2520x1386 would be a dream come true for the 100D which has the same senzor size and resolution as the 700D. I have been using the 7D at 2520x1200 resolution a lot lately and believe it or not, the 120 pixel larger vertical resolution of this camera, compared to the 100D, makes a huge difference in the overall vision of the video. A 16:9 vision at 2520x1386 would be so much better ... But I am dreaming again.
I have a question for you. You mentioned the speed booster for increased view angle with EF-S lenses on APSC-sensor based mirrorless. Would it be possible to use such speed boosters for the same purpose but with 1,6x crop sensor DSLRs operating in the LifeView (video recording) mode, with full-frame lenses, of course? If not, why not? And if yes, are such speed boosters available? Sorry for the stupid question but I have never used and even seen a speed booster sofar.
By using FPS override to lower frame rates like 12FPS the performance of write speed increases, but why?
It is very experimental and could possibly damage your card so there are no official builds. You need to compile it from the sd_uhs branch or ask someone to compile it for you.
$ pwd
/Users/username/magic-lantern/modules/sd_uhs
$ make Makefile
Using ~/gcc-arm-none-eabi-5_4-2016q3/bin/arm-none-eabi-gcc (preferred).
make: Nothing to be done for `Makefile'.You need to be in the correct branch. Check first post, bottom half since the example points to the branch in question. Continue discussion in that thread too:
https://www.magiclantern.fm/forum/index.php?topic=21882.msg199370#msg199370
...
I have another altered version of SD-UHS module, which is a little quicker and user friendly, it just setups the SD interface to highest setting.
@sheleviy
Can imagine you're not able to compile, in that case, here's a compiled version of the SD_UHS module:
https://drive.google.com/file/d/1SJHrA75UXobTzBcsEY3lqbHxhNdoksPb/view?usp=sharing (https://drive.google.com/file/d/1SJHrA75UXobTzBcsEY3lqbHxhNdoksPb/view?usp=sharing)
Just replace this one with the one on your card.
This one, when activated in Magic lantern module tab, loads automatically at camera startup.
Compile the module from this branch:
https://bitbucket.org/Dannephoto/magic-lantern/branch/crop_rec_4k_mlv_snd_isogain_1x3_presets
tcc: error: undefined symbol 'get_us_clock_value'
tcc: error: undefined symbol 'raw_force_aspect_ratio_1to1'
[E] failed to link modulestcc: error: undefined symbol 'raw_force_aspect_ratio_1to1'
tcc: error: undefined symbol 'get_ms_clock_value'
[E] failed to link modules@sheleviy
Can imagine you're not able to compile, in that case, here's a compiled version of the SD_UHS module:
https://drive.google.com/file/d/1SJHrA75UXobTzBcsEY3lqbHxhNdoksPb/view?usp=sharing (https://drive.google.com/file/d/1SJHrA75UXobTzBcsEY3lqbHxhNdoksPb/view?usp=sharing)
Just replace this one with the one on your card.
This one, when activated in Magic lantern module tab, loads automatically at camera startup.
I'd like to play with values without changing it in the code and recompiling it every time.
Can I adjust these registers by adtg_gui? if not, Can anyone knows the coding better than me make these registers adjustable via sd_uhs with a submenu ? then we can run an overclocking with the settings we did :o
static uint32_t uhs_regs[] = { 0xC0400600, 0xC0400604,/*C0400608, C040060C*/0xC0400610, 0xC0400614, 0xC0400618, 0xC0400624, 0xC0400628, 0xC040061C, 0xC0400620 }; /* register addresses */
static uint32_t sdr_160MHz[] = { 0x3, 0x2, 0x1, 0x1D000001, 0x0, 0x100, 0x101, 0x101, 0x1 }; /* (found by brute-forcing and modified by trial and error) */
Ran a brute force (random) search for the above registers, and...
SDR104 @ 160MHz 8)
......
Brute-forcing: press shutter halfway during the initial tests, until it starts running some more. Press shutter halfway again to stop (infinite loop).
No guarantees of success, no guarantees of safety, no guarantees of data integrity. You have been warned.
Please post logs and benchmarks.
I think brute forcing is a better solution but if you can .. :P make sd_uhs realize the last settings before the battery goes off and skip the tested values (time saver) and no AC adapter required (it can help with AC adapter also) & anybody can help with this without AC adapter.
Also making the tested values general or save it to the logs or something (In this way we can share in the forum the values we have tested to each other and speed up the process) then I can copy it to my card and sh_uhs will skip it.
SDR104 @ 160MHz 8)
static uint32_t uhs_regs[] = { 0xC0400600, 0xC0400604,/*C0400608, C040060C*/0xC0400610, 0xC0400614, 0xC0400618, 0xC0400624, 0xC0400628, 0xC040061C, 0xC0400620 }; /* register addresses */
static uint32_t sdr_192MHz[] = { 0x4, 0x3, 0x1, 0x1D000001, 0x0, 0x201, 0x201, 0x100, 0x1 }; /*found by trial and error*/static uint32_t uhs_regs[] = { 0xC0400600, 0xC0400604,/*C0400608, C040060C*/0xC0400610, 0xC0400614, 0xC0400618, 0xC0400624, 0xC0400628, 0xC040061C, 0xC0400620 }; /* register addresses */
static uint32_t sdr50_700D[] = { 0x3, 0x3, 0x4, 0x1D000301, 0x0, 0x201, 0x201, 0x100, 0x4 }; /* SDR50 values from 700D (96MHz) */ maybe in one week we will have 208MHz
I wouldn't rush to say this,
Explanation for above results:
As you saw in the first picture the write speed started at 81.3 MB/s then when the read speed benchmark started, the speed dropped for both write and read speeds, okay it's actually not a drop, I think after a little experiments SD UHS controllers switched back to 48 MHz mode and this happen when only performing reading action by the camera at 192 MHz (like viewing images in PLAY mode or a background tasks), (maybe it's a safeguard?) As Long as there is no reading action happening @ 192 MHz from the sd card the write speed stays @ 81.3 MB/s
Good to mention: when messing around with sd_uhs registers and perform a messed up values the camera also switch to 48 MHz mode and you can't get the default speed even if you bring registers values back to original values, you need to restart the camera (safeguard also?)
Original values from 700D is:Code: [Select]static uint32_t uhs_regs[] = { 0xC0400600, 0xC0400604,/*C0400608, C040060C*/0xC0400610, 0xC0400614, 0xC0400618, 0xC0400624, 0xC0400628, 0xC040061C, 0xC0400620 }; /* register addresses */
static uint32_t sdr50_700D[] = { 0x3, 0x3, 0x4, 0x1D000301, 0x0, 0x201, 0x201, 0x100, 0x4 }; /* SDR50 values from 700D (96MHz) */
static uint32_t uhs_regs[] = { 0xC0400600, 0xC0400604,/*C0400608, C040060C*/0xC0400610, 0xC0400614, 0xC0400618, 0xC0400624, 0xC0400628, 0xC040061C, 0xC0400620 }; /* register addresses */
static uint32_t sdr_160MHz[] = { 0x2, 0x3, 0x1, 0x1D000001, 0x0, 0x100, 0x100, 0x100, 0x1 }; /* overclocked values: 160MHz = 96*(4+1)/(2?+1) (found by brute-forcing) */
I always thought, these SD-UHS hack settings are the same on each digit 5 SD card camera
static uint32_t uhs_regs[] = { 0xC0400600, 0xC0400604,/*C0400608, C040060C*/0xC0400610, 0xC0400614, 0xC0400618, 0xC0400624, 0xC0400628, 0xC040061C, 0xC0400620 }; /* register addresses */
static uint32_t sdr_160MHz[] = { 0x3, 0x3, 0x1, 0x1D000001, 0x0, 0x201, 0x201, 0x100, 0x1 };
Code: [Select]static uint32_t uhs_regs[] = { 0xC0400600, 0xC0400604,/*C0400608, C040060C*/0xC0400610, 0xC0400614, 0xC0400618, 0xC0400624, 0xC0400628, 0xC040061C, 0xC0400620 }; /* register addresses */
static uint32_t sdr_160MHz[] = { 0x3, 0x3, 0x1, 0x1D000001, 0x0, 0x201, 0x201, 0x100, 0x1 };
Far from usable as it is uncertain when speed drop comes.
Caveat: SDR104 requires tuning the sampling point (not implemented, not performed by Canon firmware, but doable). That might be required to avoid random errors, speed drops, or higher frequency - if the controller supports it. From 0xC0400610/20, the frequencies are 80, 96, 120, 160 and 240 - the latter is probably too high.
static uint32_t sdr_160MHz[] = { 0x2, 0x3, 0x1, 0x1D000001, 0x0, 0x100, 0x100, 0x100, 0x1 }; /* overclockedTo:static uint32_t sdr_160MHz[] = { 0x3, 0x3, 0x1, 0x1D000001, 0x0, 0x100, 0x100, 0x100, 0x1 }; /* overclockedThe ones shown for 700D and 6D will not work on eosm.Eh, second benchmarking gives 76Mb/s(I had fps override set to 11fps)
Battery is full again.
Can’t reproduce again. Write speed stays at 20Mb/s.
How do you start cam, in photo or video mode?
1.639.422 Fwrite:ff337a90:MMIO : [0xC040062C] <- 0x00000001
1.639.432 Fwrite:ff3377a0:MMIO : [0xC040046C] <- 0x00000001
1.639.435 Fwrite:ff33790c:MMIO : [0xC0400600] <- 0x00000003
1.639.438 Fwrite:ff337914:MMIO : [0xC0400610] <- 0x00000009
1.639.439 Fwrite:ff33791c:MMIO : [0xC0400614] <- 0x1D000601
1.639.441 Fwrite:ff337920:MMIO : [0xC0400618] <- 0x00000000
1.639.445 Fwrite:ff337950:MMIO : [0xC0400624] <- 0x00000504
1.639.446 Fwrite:ff337954:MMIO : [0xC0400628] <- 0x00000504
1.639.447 Fwrite:ff337958:MMIO : [0xC040061C] <- 0x00000100
1.639.448 Fwrite:ff3378e0:MMIO : [0xC0400620] <- 0x00000009
1.639.450 Fwrite:ff3378e4:MMIO : [0xC0400604] <- 0x00000003 1.483.311 Fwrite:ff74aea0:23:01: sdSoftReset( 0 )
1.483.324 Fwrite:ff337a90:MMIO : [0xC040062C] <- 0x00000001
1.483.335 Fwrite:ff3377a0:MMIO : [0xC040046C] <- 0x00000001
1.483.341 Fwrite:ff3377ec:MMIO : [0xC0400600] <- 0x00000008
1.483.343 Fwrite:ff3377f4:MMIO : [0xC0400610] <- 0x0000017F
1.483.344 Fwrite:ff3377fc:MMIO : [0xC0400614] <- 0x1D004101
1.483.347 Fwrite:ff337800:MMIO : [0xC0400618] <- 0x00000000
1.483.348 Fwrite:ff337808:MMIO : [0xC0400624] <- 0x0000403F
1.483.350 Fwrite:ff33780c:MMIO : [0xC0400628] <- 0x0000403F
1.483.352 Fwrite:ff337814:MMIO : [0xC040061C] <- 0x0000007F
1.483.354 Fwrite:ff337818:MMIO : [0xC0400620] <- 0x0000007F
1.483.356 Fwrite:ff33781c:MMIO : [0xC0400604] <- 0x00000000
sdSoftReset SUCCESS
sdTrySendCommand1 Start
sdSoftReset( 0 )
sdSoftReset SUCCESS
sdIdentifyDrive Start
sdSendIFCondition Start
sdSendIFCondition End
sdSendOCR Start
sdSendIFCondition End
sdSendOCR Start
sdSendOCR End
sdAllSendCID Start
sdAllSendCID End
sdSendRelativeAddress Start
sdSendRelativeAddress End
sdSendCSD Start
sdSendCSD End
sdSendCID Start
sdSendCID: MID = 0x03, PDN = 0x534c
sdSendCID End
sdSelectDeselectCard Start
.... etc 1.009.343 Fwrite:00af7544:MMIO : [0xC0400600] <- 0xEEEEEEEE
1.009.345 Fwrite:00af7544:MMIO : [0xC0400604] <- 0xEEEEEEEE
1.009.346 Fwrite:00af7544:MMIO : [0xC0400610] <- 0xEEEEEEEE
1.009.347 Fwrite:00af7544:MMIO : [0xC0400614] <- 0xEEEEEEEE
1.009.349 Fwrite:00af7544:MMIO : [0xC0400618] <- 0xEEEEEEEE
1.009.350 Fwrite:00af7544:MMIO : [0xC0400624] <- 0xEEEEEEEE
1.009.352 Fwrite:00af7544:MMIO : [0xC0400628] <- 0xEEEEEEEE
1.009.353 Fwrite:00af7544:MMIO : [0xC040061C] <- 0xEEEEEEEE
1.009.354 Fwrite:00af7544:MMIO : [0xC0400620] <- 0xEEEEEEEEstatic uint32_t uhs_regs[] = { 0xC0400600, 0xC0400604,/*C0400608, C040060C*/0xC0400610, 0xC0400614, 0xC0400618, 0xC0400624, 0xC0400628, 0xC040061C, 0xC0400620 };
static uint32_t sdr_???MHz[] = { 0x3, 0x3, 0x1, 0x1D000001, 0x0, 0x201, 0x201, 0x100, 0x1 };
unpatch_memory(sd_setup_mode);
unpatch_memory(sd_setup_mode_in);{ 0xC0400600, 0xC0400604,/*C0400608, C040060C*/0xC0400610, 0xC0400614, 0xC0400618, 0xC0400624, 0xC0400628, 0xC040061C, 0xC0400620 }
{ 0x2, 0x2, 0x1, 0x1D000001, 0x0, 0x100, 0x100, 0x100, 0x1 };
1.300.435 Fwrite:ff74c4dc:23:26: sdDMAWriteBlk: Transfer Block Size Invalid(4809<->6167)
1.300.462 Fwrite:ff74c540:23:06: sdDMAWriteBlk(SDSTS_ED)(0x2:0x8001:0x40:0x2) sdWriteBlk: Retry:0{ 0xC0400600, 0xC0400604,/*C0400608, C040060C*/0xC0400610, 0xC0400614, 0xC0400618, 0xC0400624, 0xC0400628, 0xC040061C, 0xC0400620 }
{ 0x3, 0x2, 0x1, 0x1D000001, 0x0, 0x100, 0x101, 0x101, 0x1 }
{ 0x2, 0x2, 0x1, 0x1D000001, 0x0, 0x201, 0x201, 0x100, 0x1 }
{ 0x3, 0x2, 0x1, 0x1D000001, 0x0, 0x201, 0x201, 0x100, 0x1 }
menu_set_str_value_from_script("Movie", "RAW video", "ON", 1);or this:menu_set_str_value_from_script("Movie", "raw video", "ON", 1);Think it´s the first and then the code should apply correctly as is in the commit.Code: [Select]{ 0xC0400600, 0xC0400604,/*C0400608, C040060C*/0xC0400610, 0xC0400614, 0xC0400618, 0xC0400624, 0xC0400628, 0xC040061C, 0xC0400620 }
{ 0x3, 0x2, 0x1, 0x1D000001, 0x0, 0x100, 0x101, 0x101, 0x1 }
Now, the first one, stays stable, I've tried my best, but it never goes to 20Mb/s :D (I get about 75Mb/s in video mode 8) )
{ 0xC0400600, 0xC0400604,/*C0400608, C040060C*/0xC0400610, 0xC0400614, 0xC0400618, 0xC0400624, 0xC0400628, 0xC040061C, 0xC0400620 }
{ 0x3, 0x2, 0x1, 0x1D000001, 0x0, 0x100, 0x101, 0x101, 0x1 }
{ 0xC0400600, 0xC0400604,/*C0400608, C040060C*/0xC0400610, 0xC0400614, 0xC0400618, 0xC0400624, 0xC0400628, 0xC040061C, 0xC0400620 }
{ 0x3, 0x2, 0x1, 0x1D000001, 0x0, 0x101, 0x101, 0x101, 0x1 }
static uint32_t sdr_160MHz[] = { 0x2, 0x3, 0x1, 0x1D000001, 0x0, 0x100, 0x100, 0x100, 0x1 };(https://www.magiclantern.fm/forum/proxy.php?request=https%3A%2F%2Fi.postimg.cc%2FprH0jL0G%2Fbench1-ppm-500px.png&hash=6de04a0b5ab393dfd6f2b83ba3884527)static uint32_t sdr_160MHz[] = { 0x2, 0x2, 0x1, 0x1D000001, 0x0, 0x100, 0x100, 0x100, 0x1 };{ 0xC0400600, 0xC0400604,/*C0400608, C040060C*/0xC0400610, 0xC0400614, 0xC0400618, 0xC0400624, 0xC0400628, 0xC040061C, 0xC0400620 }
{ 0x3, 0x2, 0x1, 0x1D000001, 0x0, 0x100, 0x101, 0x101, 0x1 }With the above settings I get with benchmark in photo mode:
Write 84.0Mb/s
Read 90.3Mb/s
Write 84.0Mb/s
Read 90.3Mb/s
The card is a 64Gb Sandisk Extreme Pro (95MB/s claim on label)
Are you formatting with exfat maybe?
Strange Levas, getting that in between goodies.
Could it be that the 6d has some more cpu overhead ?
static uint32_t sdr_160MHz[] = { 0x2, 0x3, 0x1, 0x1D000001, 0x0, 0x100, 0x100, 0x100, 0x1 };to this:static uint32_t sdr_160MHz[] = { 0x2, 0x2, 0x1, 0x1D000001, 0x0, 0x100, 0x100, 0x100, 0x1 };{ 0xC0400600, 0xC0400604,/*C0400608, C040060C*/0xC0400610, 0xC0400614, 0xC0400618, 0xC0400624, 0xC0400628, 0xC040061C, 0xC0400620 }
{ 0x8, 0x3, 0x4, 0x1D000301, 0x0, 0x201, 0x201, 0x100, 0x4 }{ 0xC0400600, 0xC0400604,/*C0400608, C040060C*/0xC0400610, 0xC0400614, 0xC0400618, 0xC0400624, 0xC0400628, 0xC040061C, 0xC0400620 }
{ 0x8, 0x3, 0x3, 0x1D000301, 0x0, 0x201, 0x201, 0x100, 0x3 }{ 0xC0400600, 0xC0400604,/*C0400608, C040060C*/0xC0400610, 0xC0400614, 0xC0400618, 0xC0400624, 0xC0400628, 0xC040061C, 0xC0400620 }
{ 0x8, 0x3, 0x4, 0x1D000301, 0x0, 0x100, 0x201, 0x201, 0x4 }(https://www.magiclantern.fm/forum/proxy.php?request=https%3A%2F%2Fi.postimg.cc%2FHnPF6Z9Z%2Fbench3-ppm-500px.png&hash=89e760891a15ab3e0fefe0a056112ee4)0x8, 0x3, 0x4, 0x1D000301, 0x0, 0x201, 0x201, 0x100, 0x4
EDIT:
This also works:Code: [Select]0x8, 0x3, 0x4, 0x1D000301, 0x0, 0x201, 0x201, 0x100, 0x4
Haven't been able to break the above settings to 20Mb/s 8)unbelievable!
In video mode, recording bitrate starts at about 82Mb/s, saw it climb up to 88Mb/s during recording :D
Benchmark in video mode:
Write speed 80.0 Mb/s
Read speed 83.7 Mb/s
Write speed 80.0 Mb/s
Read speed 83.5 Mb/s
Sandisk wants to know your location!Say what?
0x8, 0x3, 0x4, 0x1D000301, 0x0, 0x201, 0x201, 0x100, 0x4
0x8, 0x3, 0x3, 0x1D000301, 0x0, 0x201, 0x201, 0x100, 0x3
Wait for the magician. I think he returns with 90Mb/s :P.
{ 0xC0400600, 0xC0400604,/*C0400608, C040060C*/0xC0400610, 0xC0400614, 0xC0400618, 0xC0400624, 0xC0400628, 0xC040061C, 0xC0400620 }
{ 0x8, 0x3, 0x3, 0x1D000301, 0x0, 0x201, 0x201, 0x100, 0x3 }
@Danne and @theBilalFakhouri
Are your settings stable or does it still switch to 20Mb/s after a while ?
{ 0xC0400600, 0xC0400604,/*C0400608, C040060C*/0xC0400610, 0xC0400614, 0xC0400618, 0xC0400624, 0xC0400628, 0xC040061C, 0xC0400620 }
{ 0x8, 0x3, 0x4, 0x1D000301, 0x0, 0x201, 0x201, 0x100, 0x4 }{ 0xC0400600, 0xC0400604,/*C0400608, C040060C*/0xC0400610, 0xC0400614, 0xC0400618, 0xC0400624, 0xC0400628, 0xC040061C, 0xC0400620 }
{ 0x8, 0x3, 0x3, 0x1D000301, 0x0, 0x201, 0x201, 0x100, 0x3 }sdDMAWriteBlk: Transfer Block Size Invalid I end up with a Card not working with Camera, it couldn't startup again with card I made the call with, on PC the card works just fine, I formatted it many times in different types, the camera refused to work with the card, until I got SD Memory Card Formatter from SD Association, that resolved the problem like magic after a quick format . .However the write speed on these two presets are not constant, it drops especially on Sandisk Extreme Pro 170 MB/s
{ 0xC0400600, 0xC0400604,/*C0400608, C040060C*/0xC0400610, 0xC0400614, 0xC0400618, 0xC0400624, 0xC0400628, 0xC040061C, 0xC0400620 }
{ 0x8, 0x3, 0x4, 0x1D000301, 0x0, 0x201, 0x201, 0x100, 0x4 }{ 0xC0400600, 0xC0400604,/*C0400608, C040060C*/0xC0400610, 0xC0400614, 0xC0400618, 0xC0400624, 0xC0400628, 0xC040061C, 0xC0400620 }
{ 0x8, 0x3, 0x3, 0x1D000301, 0x0, 0x201, 0x201, 0x100, 0x3 }
patch 2 WORKED!!!!!!!!!!!!!Unexpected since card slot in 5d3 is a slow story. Did you test card spanning?
it recorded at 80.x MB/S for 3 recordings in excess of 1 minute each, strictly to the sd card.
the 4th recording didn't work, with the "card full" error (card wasn't full)
i looked at the resulting video files and they were perfect. no lost frames, no issues of any kind!
this is VERY exciting stuff, wow!
Tested previous version. I have no words ...Exactly what version 8)?
Exactly what version 8)?https://drive.google.com/file/d/1wRLfWoMDCxB2SAZXRVoKM-9plDBAvxIq/view?usp=sharing
{ 0xC0400600, 0xC0400604,/*C0400608, C040060C*/0xC0400610, 0xC0400614, 0xC0400618, 0xC0400624, 0xC0400628, 0xC040061C, 0xC0400620 }
{ 0x8, 0x3, 0x3, 0x1D000301, 0x0, 0x201, 0x201, 0x100, 0x3 }
But 700d and EOSM don’t benefit from the same sd_uhs settings ???
{ 0xC0400600, 0xC0400604,/*C0400608, C040060C*/0xC0400610, 0xC0400614, 0xC0400618, 0xC0400624, 0xC0400628, 0xC040061C, 0xC0400620 }
{ 0x3, 0x3, 0x1, 0x1D000001, 0x0, 0x201, 0x201, 0x100, 0x1 }If you think about it, it is ridiculous what these old cameras can do.
Imagine if Canon gave these write speeds and raw video recording at the introduction date
After some more searching in the LOG 0 I found this, maybe it's where the problem starts:Code: [Select]1.300.435 Fwrite:ff74c4dc:23:26: sdDMAWriteBlk: Transfer Block Size Invalid(4809<->6167)
1.300.462 Fwrite:ff74c540:23:06: sdDMAWriteBlk(SDSTS_ED)(0x2:0x8001:0x40:0x2)
1.639.620 Fwrite:ff74c410:MMIO : [0xC0C2007C] <- 0x00001817 1.300.233 **INT172h*:ff74c11c:MMIO : [0xC0C20080] -> 0x000012C9 1.300.435 Fwrite:ff74c4dc:23:26: sdDMAWriteBlk: Transfer Block Size Invalid(4809<->6167)
1.300.462 Fwrite:ff74c540:23:06: sdDMAWriteBlk(SDSTS_ED)(0x2:0x8001:0x40:0x2) ----------------------- what is this ? 1.300.732 Fwrite:ff74c7b4:23:26: sdWriteBlk: Retry:0 102694 6167 in both cases, it was almost as if it is "pinned" at about 131 MB/s between the two cards.
it actually says 5752 MB/S for the read speed, but my mind refused to accept it and edited it to say bytes per second instead.
and there is a malloc error for the read tests (malloc error: buffer=16777216
it boots with other cards.
photo mode, global draw off (MB/S results) 96, 451, 96, 5785
video mode, raw video off (thanks bilal): 77, 3710, 77, 3778
Thanks for the build, Danne. With my SanDisk Extreme Pro 64GB 95MB/s and EOSM I get the following:
- 192MHz
(https://www.magiclantern.fm/forum/proxy.php?request=https%3A%2F%2Fi.ibb.co%2FJp1xRVC%2Fbench2.png&hash=0a470fa9fe105fea38901c82d9307fd5)
Yeah. No luck with that card. Jiphop got it better. Well good with reports.
/* power-cycle and reconfigure the SD card */
//SD_ReConfiguration();
/* enable SDR104 */
patch_hook_function(sd_set_function, MEM(sd_set_function), sd_set_function_log, "SDR104");
//SD_ReConfiguration();
if (sd_overclock == 1) memcpy(uhs_vals, sdr_160MHz, sizeof(uhs_vals));
if (sd_overclock == 2) memcpy(uhs_vals, sdr_192MHz, sizeof(uhs_vals));
if (sd_overclock == 3) memcpy(uhs_vals, sdr_240MHz, sizeof(uhs_vals));I can run a benchmark if anybody would be so kind to let me know how to do that :D
What else could you wish for?
(https://www.magiclantern.fm/forum/proxy.php?request=https%3A%2F%2Fi.ibb.co%2Fd47HRcp%2FConstant-240-MHz.png&hash=7b7c44d0e11b059f76c46fd26ef7c283) (https://ibb.co/v4DMSBd)
/* power-cycle and reconfigure the SD card */
SD_ReConfiguration();
New build up according to BilalFakhouri suggestion. Maybe works better @masc?Oh, thanks. This seems to work better! In 192MHz I see a speed drop between 55/100 and 65/100, all other numbers are shown a shorter time. That's the result for 192MHz:
https://bitbucket.org/Dannephoto/magic-lantern/downloads/crop_rec_4k_mlv_snd_raw_only_2020Jul04.EOSM202.zip
Speed drop?After starting the benchmark you see the numbers "running" from 1 to 100. This speed for changing the numbers is always the same. Only between 55 and 65 it is way slower.
So 95Mb/s cards is working now? Did yoy need any low level formatting in cam?
I removed restoring ml when formatting for now. Will damage your card with sd hack enabled. Until I know how to fix it you need to reinstall if you want to do low level format.
From Debug menu you will find DebugMsgs something like that, press it, now it will starts logging, take a picture and press DebugMsgs again to stop it, it's printing the LOG now, you will find it on SD card root, that's it
5D3 differs in patch behaviour. I do my best to work around the issues. Formatting restoring seriously messes things up. Probably simply need to wait after all has been restored but with my c skill levels it's gonna take a week tinkering :P.
i just tested my $5 (CDN) kingston 128GB card (microSD with supplied adapter) and it WORKS at 95MB/S
simply installed danne's build from today, enabled overclock with the 95MB/S option, rebooted the camera, and started recording!
i recorded 2880*1226 @ 24FPS, 14bit lossless using the uhd preset. NO CF card installed, recorded only to the $5 128GB card, and the overexposed scene had a green indicator!
i think i am dreaming...
bilal, i'm using a sandisk extreme pro 170mb/s on my 5d3.
..
3616*1536 @ 24fps 14 bits lossless, extremely overexposed scene: continuous recording with a green icon!
...
i just tested my $5 (CDN) kingston 128GB card (microSD with supplied adapter) and it WORKS at 95MB/S
/* called right before the case switch in sd_setup_mode (not at the start of the function!) */
static void sd_setup_mode_in_log(uint32_t* regs, uint32_t* stack, uint32_t pc)
{
qprintf("sd_setup_mode switch(mode=%x) en=%d\n", regs[sd_setup_mode_reg], sd_setup_mode_enable);
if (sd_setup_mode_enable && regs[sd_setup_mode_reg] == 4) /* SDR50? */
{
/* set our register overrides */
for (int i = 0; i < COUNT(uhs_regs); i++)
{
MEM(uhs_regs[i]) = uhs_vals[i];
}
/* set some invalid mode to bypass the case switch
* and keep our register values only */
regs[sd_setup_mode_reg] = 0x13;
}
}If I do something like: if (sd_setup_mode_enable && regs[sd_setup_mode_reg]) /* SDR50? */This gets called all the time and caused the card to spin off. Needless to say. Don´t try this at home.
Uploaded new builds for 5D3. The 160Mhz preset will now use the older patch, more stable.
Tested 240Mb/s, it´s rock solid.
Good, you mean 240MHz ?Hehe, yes :P
Could we have benchmark in PLAY Mode with the used Card @ 240 MHz, Also how this preset (https://www.magiclantern.fm/forum/index.php?topic=12862.msg228519#msg228519) perform in 5D3 ?
0x3, 0x2, 0x1, 0x1D000001, 0x0, 0x100, 0x101, 0x101, 0x1(https://www.magiclantern.fm/forum/proxy.php?request=https%3A%2F%2Fi.postimg.cc%2Fs2WZkXLw%2Fbench2-ppm-500px.png&hash=0ff62f7405d45caf587a1e900613fea5)0x8, 0x3, 0x3, 0x1D000301, 0x0, 0x201, 0x201, 0x100, 0x3(https://www.magiclantern.fm/forum/proxy.php?request=https%3A%2F%2Fi.postimg.cc%2FDwHXpsxS%2Fbench3-ppm-500px.png&hash=28d4a4f660b88f5d5697e173f668776a)0x8, 0x3, 0x4, 0x1D000301, 0x0, 0x201, 0x201, 0x100, 0x4(https://www.magiclantern.fm/forum/proxy.php?request=https%3A%2F%2Fi.postimg.cc%2F9FxTTsTt%2Fbench4-ppm-500px.png&hash=0e14fa4e13cf474ec628ed067a0d46f6)
Edit: Actually seems possible to reach 17fps with full resolution but no way continuous. Might be useful as a burst mode setting.
Exactly. That´s why benchmarks are so fast when in play mode. Higher fps reduces the effect.
Caveat: SDR104 requires tuning the sampling point (not implemented, not performed by Canon firmware, but doable). That might be required to avoid random errors, speed drops, or higher frequency - if the controller supports it.
Comment it out
/* enable SDR104 */
//patch_hook_function(sd_set_function, MEM(sd_set_function), sd_set_function_log, "SDR104");if (sd_setup_mode_enable && regs[sd_setup_mode_reg] == 4) /* SDR50? */to if (sd_setup_mode_enable && regs[sd_setup_mode_reg] == 3) /* SDR50? */static uint32_t sdr50_700D[] = { 0x3, 0x3, 0x4, 0x1D000301, 0x0, 0x201, 0x201, 0x100, 0x4, 0 };
static uint32_t sdr50_700D[] = { 0x3, 0x3, 0x3, 0x1D000301, 0x0, 0x201, 0x201, 0x100, 0x3, 0 };[sd_setup_mode_reg] == 4) /* SDR50? */[sd_setup_mode_reg] == 3) static void sd_set_function_log(uint32_t* regs, uint32_t* stack, uint32_t pc)
{
qprintf("sd_set_function(0x%x)\n", regs[0]);
/* UHS-I SDR50? */
// if (regs[0] == 0xff0002)
// {
regs[0] = 0xff0003;
// }
..
..
patch_hook_function(sd_set_function, MEM(sd_set_function), sd_set_function_log, "SDR104");static void sd_set_function_log(uint32_t* regs, uint32_t* stack, uint32_t pc)
{
qprintf("sd_set_function(0x%x)\n", regs[0]);
/* UHS-I SDR50? */
// if (regs[0] == 0xff0002)
// {
regs[0] = 0xff0004; /*now it's 0xff0004 instead of 0xff0003*/
// }
..
..
patch_hook_function(sd_set_function, MEM(sd_set_function), sd_set_function_log, "SDR104");static uint32_t sdr50_700D[] = { 0x3, 0x3, 0x2, 0x1D000201, 0x0, 0x201, 0x201, 0x100, 0x2, 0 };
if (sd_setup_mode_enable && regs[sd_setup_mode_reg] == 4) /* SDR50? */if (sd_setup_mode_enable) /* SDR50? */Hello, I have used in twixtor plugin with resolve 16 studio for 5d3 14 bits 1920x3240 15.003 anamorphic and it does not improve just in the interpolation at 24 fps, some advice to edit with this resolution.
Thank you.
For 650d you could try the build posted by me on page 18 of this topic (Reply #446 on: July 02, 2020, 01:58:05 PM)
The module in that post should work on 650d in combination with crop_rec_4K build from the experimental builds downloadpage on this site.
static uint32_t uhs_regs[] = { 0xC0400600, 0xC0400604,/*C0400608, C040060C*/0xC040060C, 0xC0400614, 0xC0400618, 0xC0400624, 0xC0400628, 0xC040061C, 0xC0400620 }; /* register addresses */
static uint32_t sdr_192MHz[] = { 0x8, 0x3, 0x4, 0x1D000301, 0x0, 0x201, 0x201, 0x100, 0x4 };static uint32_t uhs_regs[] = { 0xC0400600, 0xC0400604,/*C0400608, C040060C*/0xC0400610, 0xC0400614, 0xC0400618, 0xC0400624, 0xC0400628, 0xC040061C, 0xC0400620 };To this:static uint32_t uhs_regs[] = { 0xC0400600, 0xC0400604,/*C0400608, C040060C*/0xC040060C, 0xC0400614, 0xC0400618, 0xC0400624, 0xC0400628, 0xC040061C, 0xC0400620 };
/* enable SDR104 */
//patch_hook_function(sd_set_function, MEM(sd_set_function), sd_set_function_log, "SDR104");
//SD_ReConfiguration();//static void sd_set_function_log(uint32_t* regs, uint32_t* stack, uint32_t pc)
//{
// qprintf("sd_set_function(0x%x)\n", regs[0]);
/* UHS-I SDR50? */
//if (regs[0] == 0xff0002)
//{
/* force UHS-I SDR104 */
// regs[0] = 0xff0003;
// }
// }/**
* Experimental SD UHS overclocking.
*/
#include <module.h>
#include <dryos.h>
#include <patch.h>
#include <console.h>
#include <config.h>
#include <lens.h>
/* camera-specific parameters */
static uint32_t sd_setup_mode = 0;
static uint32_t sd_setup_mode_in = 0;
static uint32_t sd_setup_mode_reg = 0xFFFFFFFF;
static uint32_t sd_set_function = 0;
static uint32_t uhs_regs[] = { 0xC0400600, 0xC0400604,/*C0400608, C040060C*/0xC0400610, 0xC0400614, 0xC0400618, 0xC0400624, 0xC0400628, 0xC040061C, 0xC0400620 }; /* register addresses */
static uint32_t sdr_160MHz[] = { 0x2, 0x2, 0x1, 0x1D000001, 0x0, 0x100, 0x100, 0x100, 0x1 }; /* overclocked values: 160MHz = 96*(4+1)/(2?+1) (found by brute-forcing) */
static uint32_t sdr_192MHz[] = { 0x8, 0x3, 0x4, 0x1D000301, 0x0, 0x201, 0x201, 0x100, 0x4 };
static uint32_t sdr_240MHz[] = { 0x8, 0x3, 0x3, 0x1D000301, 0x0, 0x201, 0x201, 0x100, 0x3 };
static uint32_t uhs_vals[COUNT(uhs_regs)]; /* current values */
static int sd_setup_mode_enable = 0;
static int turned_on = 0;
static CONFIG_INT("sd.sd_overclock", sd_overclock, 2);
/* start of the function */
static void sd_setup_mode_log(uint32_t* regs, uint32_t* stack, uint32_t pc)
{
qprintf("sd_setup_mode(dev=%x)\n", regs[0]);
/* this function is also used for other interfaces, such as serial flash */
/* only enable overriding when called with dev=1 */
sd_setup_mode_enable = (regs[0] == 1);
}
/* called right before the case switch in sd_setup_mode (not at the start of the function!) */
static void sd_setup_mode_in_log(uint32_t* regs, uint32_t* stack, uint32_t pc)
{
qprintf("sd_setup_mode switch(mode=%x) en=%d\n", regs[sd_setup_mode_reg], sd_setup_mode_enable);
if (sd_setup_mode_enable && regs[sd_setup_mode_reg] == 4) /* SDR50? */
{
/* set our register overrides */
for (int i = 0; i < COUNT(uhs_regs); i++)
{
MEM(uhs_regs[i]) = uhs_vals[i];
}
/* set some invalid mode to bypass the case switch
* and keep our register values only */
regs[sd_setup_mode_reg] = 0x13;
}
}
static void sd_overclock_task()
{
/* install the hack */
if (sd_overclock == 1) memcpy(uhs_vals, sdr_160MHz, sizeof(uhs_vals));
if (sd_overclock == 2) memcpy(uhs_vals, sdr_192MHz, sizeof(uhs_vals));
if (sd_overclock == 3) memcpy(uhs_vals, sdr_240MHz, sizeof(uhs_vals));
patch_hook_function(sd_setup_mode, MEM(sd_setup_mode), sd_setup_mode_log, "SD UHS");
patch_hook_function(sd_setup_mode_in, MEM(sd_setup_mode_in), sd_setup_mode_in_log, "SD UHS");
}
static struct menu_entry sd_uhs_menu[] =
{
{
.name = "sd overclock",
.priv = &sd_overclock,
.max = 3,
.choices = CHOICES("OFF", "160MHz", "192MHz", "240MHz(feeling lucky)"),
.help = "Select a patch and restart camera. Disable with OFF and restart",
.help2 = "Proven working with 95Mb/s and 170Mb/s cards",
}
};
static struct menu_entry sd_uhs_menu1[] =
{
{
.name = "sd overclock",
.priv = &sd_overclock,
.max = 3,
.choices = CHOICES("OFF", "160MHz", "192MHz", "240MHz (feeling lucky)"),
.help = "Select a patch and restart camera. Disable with OFF and restart",
.help2 = "Proven working with 95Mb/s and 170Mb/s cards",
}
};
static unsigned int sd_uhs_init()
{
//needed with manual lenses cause it stalls liveview. Maybe helps for cams like 6D. To be tested.
while (is_movie_mode() && !lv)
{
msleep(100);
}
if (is_camera("EOSM", "2.0.2"))
{
sd_setup_mode = 0xFF338D40;
sd_setup_mode_in = 0xFF338DC8;
sd_setup_mode_reg = 1;
sd_set_function = 0xFF63EF60;
if (sd_overclock)
{
sd_overclock_task();
turned_on = 1;
}
}
menu_add("Movie", sd_uhs_menu, COUNT(sd_uhs_menu));
menu_add("Debug", sd_uhs_menu1, COUNT(sd_uhs_menu1));
return 0;
}
static unsigned int sd_uhs_deinit()
{
return 0;
}
MODULE_INFO_START()
MODULE_INIT(sd_uhs_init)
MODULE_DEINIT(sd_uhs_deinit)
MODULE_INFO_END()
MODULE_CONFIGS_START()
MODULE_CONFIG(sd_overclock)
MODULE_CONFIGS_END()I want to test on my t3i. I'm going to buy a bestbuy today to get a faster sd card. Is there a test build/module for that one?
ff38b1f8: STRING: 'cfIdentifyDrive: Set UDMA( Mode=%d )'
ff38b1b0: 128f20dc addne r2, pc, #220 ; *'CF_DeviceCreate: SoftReset
ffbdbb48: STRING: 'CF_GetAccessTiming : DatTim = %d, DatMod = %d' ff395544: STRING: 'SD_SetBusWidth: Width(Width=%d)'
ff395564: STRING: 'SD_SetBusWidth(CMD55)'
ff3955b0: STRING: 'SD_SetBusWidth(ACMD6)'
ff74aafc: e28f2e26 add r2, pc, #608 ; ff74ad64: (20746553) *"Set 1.8V Signaling"
ff74d684: e28f20fc add r2, pc, #252 ; ff74d788: (65536473) *"sdSendVoltageSwitch"
interesting ! i think the voltage for the older cards are around 3.3Vdc , or unless the newer cards use less voltage .Also when overclocking to a higher speed dose the voltage increase to support the data output ?
I hoping to set CF to UDMA7 from 6 by code ,
it seems to me that same of the unstable results are some missing configuration or reg
has anyone tried faster cards than the sandisk 170mb/s?
Because of the 131mb/s writespeed limit, ...
Tested previous version. I have no words ...
(https://www.magiclantern.fm/forum/proxy.php?request=https%3A%2F%2Fabload.de%2Fimg%2Fbench30fxjrs.png&hash=ebc93cd3c225412a45c0d44bc943812d)
SanDisk Extreme Pro 95 MB/s 128 GB.
Does the speed drop to 21 MB/s when doing some RAW recording e.g 1736x976 @ 23.976 14-bit uncompressed ?
Could you make a test with above settings (and other settings require 67 MB/s at lest) by filling the card up to 32 GB or more?
Used another card and recorded 9 and 10 minutes at around 67.9 MByte/s. Files 36.4 GB and 39.8 GB.
Not sure for which camera you need it ?Cheers, it's for a 6D indeed. Looks like i got to catch up with the latest developments :)
For 6d you can find the latest complete build with sd_uhs module in this post:
https://www.magiclantern.fm/forum/index.php?topic=15088.msg229094#msg229094 (https://www.magiclantern.fm/forum/index.php?topic=15088.msg229094#msg229094)
Beautiful numbers Zeek.
Could we have a 5D3 tester with this card? Let me know if so.
Adding active cooling to the card might also work but doesn't seem very practical. Might be interesting to see if overclocking is more reliable inside a fridge! We might learn if heat is a real factor here. Drill holes into the battery / card compartment in advance for best testing ;)
Great.
I need to prepare a build later tonight. However. You need firmware 1.1.3 or 1.2.3 to even be able and install magic lantern. Ever installed before?
Ok. Work only with sd card in your camera.
You are gonna need this build:
https://bitbucket.org/Dannephoto/magic-lantern_dannephoto_git/downloads/crop_rec_4k_mlv_snd_isogain_1x3_presets_2020Sep14.5D3123.zip
Replace the sd_uhs.mo to the one below:
https://bitbucket.org/Dannephoto/raw2mlv/downloads/sd_uhs.mo
Enable bench.mo. The rest of the modules will be enabled automatically.
1 - Enable the sd uhs patch called 240Mb/s and restart camera.
2 - Enter photo mode and run the 1 minute benchmark test. Are you getting high readings? Should be bitmap file on your sd card recorded.
3 - Now take a photo, then rerun benchmark test. Are you still having high numbers? If not your card will not respond well with 240Mb/s. If results still are high move on to step 4
4 - Enter movie movie mode. Start recording in anamorphic mode. Do about three to 5 takes. Everything orking as expected? If so, this card should be working with the patch.
*Note, I could also record 2.8K RAW on the EOS M @2.35:1 with green signal for over a minute.
https://drive.google.com/file/d/1SQQzYvFAt1p0heYqJu_JS3AGb7l9Qz5u/view?usp=sharing
With the 192Mhz patch I get about 5-12 Seconds, with the 240MHz patch, 1 Minute & above. Not sure about the consequences of using the highest patch and how taxing it can be on the card in long term use. Don't think it should be too bad.
Wow, great to hear that recording with 240MHz is possible. Shame it requires such an expensive card. Does this card work at 240MHz on multiple cameras?Yes indeed! I'm no rich guy, but after being an EOS M user for a few yeas now, I knew it was finally worth the jump ;) Yes, it works on all my EOS M Cams.
These cards do have a lifetime warranty (https://kb.sandisk.com/app/warranty/a_id/22478), don't be shy about frying your card for science :DHaha, better not lose the receipt ;)
static void (*SD_SoftReset)() = 0xFF74AE78; /* 700D.115 */
SD_SoftReset();3.405.991 run_test:ff74aea0:23:01: sdSoftReset( 0 )
..
3.406.540 run_test:ff74af14:23:01: sdSoftReset SUCCESS
..
4.154.844 menu_task:ff74aea0:23:01: sdSoftReset( 0 )
..
4.155.645 menu_task:ff74af14:23:01: sdSoftReset SUCCESS
4.155.656 menu_task:ff74af30:23:01: sdTrySendCommand1 Start
..
4.157.496 menu_task:ff74af78:23:03: sdTrySendCommand1: Timeout
..
etc